From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161064AbdAEI1c (ORCPT ); Thu, 5 Jan 2017 03:27:32 -0500 Received: from mail-ua0-f174.google.com ([209.85.217.174]:36197 "EHLO mail-ua0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1033247AbdAEI0x (ORCPT ); Thu, 5 Jan 2017 03:26:53 -0500 MIME-Version: 1.0 In-Reply-To: <20170104143752.bl47gdfczbnfy6b3@rob-hp-laptop> References: <1483508082-7008-1-git-send-email-anup.patel@broadcom.com> <1483508082-7008-3-git-send-email-anup.patel@broadcom.com> <20170104143752.bl47gdfczbnfy6b3@rob-hp-laptop> From: Anup Patel Date: Thu, 5 Jan 2017 13:56:51 +0530 Message-ID: Subject: Re: [PATCH v3 2/2] dt-bindings: Add DT bindings info for FlexRM ring manager To: Rob Herring Cc: Jassi Brar , Mark Rutland , Ray Jui , Scott Branden , Pramod KUMAR , Rob Rice , Device Tree , Linux Kernel , Linux ARM Kernel , BCM Kernel Feedback Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jan 4, 2017 at 8:07 PM, Rob Herring wrote: > On Wed, Jan 04, 2017 at 11:04:42AM +0530, Anup Patel wrote: >> This patch adds device tree bindings document for the FlexRM >> ring manager found on Broadcom iProc SoCs. >> >> Reviewed-by: Ray Jui >> Reviewed-by: Scott Branden >> Signed-off-by: Anup Patel >> --- >> .../bindings/mailbox/brcm,iproc-flexrm-mbox.txt | 60 ++++++++++++++++++++++ >> 1 file changed, 60 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt >> >> diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt >> new file mode 100644 >> index 0000000..ca51a39 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt >> @@ -0,0 +1,60 @@ >> +Broadcom FlexRM Ring Manager >> +============================ >> +The Broadcom FlexRM ring manager provides a set of rings which can be >> +used to submit work to offload engines. An SoC may have multiple FlexRM >> +hardware blocks. There is one device tree entry per FlexRM block. The >> +FlexRM driver will create a mailbox-controller instance for given FlexRM >> +hardware block where each mailbox channel is a separate FlexRM ring. >> + >> +Required properties: >> +-------------------- >> +- compatible: Should be "brcm,iproc-flexrm-mbox" >> +- reg: Specifies base physical address and size of the FlexRM >> + ring registers >> +- msi-parent: Phandles (and potential Device IDs) to MSI controllers >> + The FlexRM engine will send MSIs (instead of wired >> + interrupts) to CPU. There is one MSI for each FlexRM ring. >> + Refer devicetree/bindings/interrupt-controller/msi.txt >> +- #mbox-cells: Specifies the number of cells needed to encode a mailbox >> + channel. This should be 3. >> + >> + The 1st cell is the mailbox channel number. >> + >> + The 2nd cell contains MSI completion threshold. This is the >> + number of completion messages for which FlexRM will inject >> + one MSI interrupt to CPU. >> + >> + The 3nd cell contains MSI timer value representing time for >> + which FlexRM will wait to accumulate N completion messages >> + where N is the value specified by 2nd cell above. If FlexRM >> + does not get required number of completion messages in time >> + specified by this cell then it will inject one MSI interrupt >> + to CPU provided atleast one completion message is available. >> + >> +Optional properties: >> +-------------------- >> +- dma-coherent: Present if DMA operations made by the FlexRM engine (such >> + as DMA descriptor access, access to buffers pointed by DMA >> + descriptors and read/write pointer updates to DDR) are >> + cache coherent with the CPU. >> + >> +Example: >> +-------- >> +crypto_mbox: mbox@67000000 { >> + compatible = "brcm,iproc-flexrm-mbox"; >> + reg = <0x67000000 0x200000>; >> + msi-parent = <&gic_its 0x7f00>; >> + #mbox-cells = <3>; >> +}; >> + >> +crypto_client { > > crypto@ > >> + ... >> + mboxes = <&crypto_mbox 0 0x1 0xffff>, >> + <&crypto_mbox 1 0x1 0xffff>, >> + <&crypto_mbox 16 0x1 0xffff>, >> + <&crypto_mbox 17 0x1 0xffff>, >> + <&crypto_mbox 30 0x1 0xffff>, >> + <&crypto_mbox 31 0x1 0xffff>; >> + }; >> + ... > > Please somewhat fully list the contents for node. > Sure, I will add more complete example DT node for mailbox client. Regards, Anup From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anup Patel Subject: Re: [PATCH v3 2/2] dt-bindings: Add DT bindings info for FlexRM ring manager Date: Thu, 5 Jan 2017 13:56:51 +0530 Message-ID: References: <1483508082-7008-1-git-send-email-anup.patel@broadcom.com> <1483508082-7008-3-git-send-email-anup.patel@broadcom.com> <20170104143752.bl47gdfczbnfy6b3@rob-hp-laptop> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20170104143752.bl47gdfczbnfy6b3@rob-hp-laptop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Rob Herring Cc: Mark Rutland , Device Tree , Scott Branden , Ray Jui , Jassi Brar , Linux Kernel , Pramod KUMAR , BCM Kernel Feedback , Rob Rice , Linux ARM Kernel List-Id: devicetree@vger.kernel.org On Wed, Jan 4, 2017 at 8:07 PM, Rob Herring wrote: > On Wed, Jan 04, 2017 at 11:04:42AM +0530, Anup Patel wrote: >> This patch adds device tree bindings document for the FlexRM >> ring manager found on Broadcom iProc SoCs. >> >> Reviewed-by: Ray Jui >> Reviewed-by: Scott Branden >> Signed-off-by: Anup Patel >> --- >> .../bindings/mailbox/brcm,iproc-flexrm-mbox.txt | 60 ++++++++++++++++++++++ >> 1 file changed, 60 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt >> >> diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt >> new file mode 100644 >> index 0000000..ca51a39 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt >> @@ -0,0 +1,60 @@ >> +Broadcom FlexRM Ring Manager >> +============================ >> +The Broadcom FlexRM ring manager provides a set of rings which can be >> +used to submit work to offload engines. An SoC may have multiple FlexRM >> +hardware blocks. There is one device tree entry per FlexRM block. The >> +FlexRM driver will create a mailbox-controller instance for given FlexRM >> +hardware block where each mailbox channel is a separate FlexRM ring. >> + >> +Required properties: >> +-------------------- >> +- compatible: Should be "brcm,iproc-flexrm-mbox" >> +- reg: Specifies base physical address and size of the FlexRM >> + ring registers >> +- msi-parent: Phandles (and potential Device IDs) to MSI controllers >> + The FlexRM engine will send MSIs (instead of wired >> + interrupts) to CPU. There is one MSI for each FlexRM ring. >> + Refer devicetree/bindings/interrupt-controller/msi.txt >> +- #mbox-cells: Specifies the number of cells needed to encode a mailbox >> + channel. This should be 3. >> + >> + The 1st cell is the mailbox channel number. >> + >> + The 2nd cell contains MSI completion threshold. This is the >> + number of completion messages for which FlexRM will inject >> + one MSI interrupt to CPU. >> + >> + The 3nd cell contains MSI timer value representing time for >> + which FlexRM will wait to accumulate N completion messages >> + where N is the value specified by 2nd cell above. If FlexRM >> + does not get required number of completion messages in time >> + specified by this cell then it will inject one MSI interrupt >> + to CPU provided atleast one completion message is available. >> + >> +Optional properties: >> +-------------------- >> +- dma-coherent: Present if DMA operations made by the FlexRM engine (such >> + as DMA descriptor access, access to buffers pointed by DMA >> + descriptors and read/write pointer updates to DDR) are >> + cache coherent with the CPU. >> + >> +Example: >> +-------- >> +crypto_mbox: mbox@67000000 { >> + compatible = "brcm,iproc-flexrm-mbox"; >> + reg = <0x67000000 0x200000>; >> + msi-parent = <&gic_its 0x7f00>; >> + #mbox-cells = <3>; >> +}; >> + >> +crypto_client { > > crypto@ > >> + ... >> + mboxes = <&crypto_mbox 0 0x1 0xffff>, >> + <&crypto_mbox 1 0x1 0xffff>, >> + <&crypto_mbox 16 0x1 0xffff>, >> + <&crypto_mbox 17 0x1 0xffff>, >> + <&crypto_mbox 30 0x1 0xffff>, >> + <&crypto_mbox 31 0x1 0xffff>; >> + }; >> + ... > > Please somewhat fully list the contents for node. > Sure, I will add more complete example DT node for mailbox client. Regards, Anup From mboxrd@z Thu Jan 1 00:00:00 1970 From: anup.patel@broadcom.com (Anup Patel) Date: Thu, 5 Jan 2017 13:56:51 +0530 Subject: [PATCH v3 2/2] dt-bindings: Add DT bindings info for FlexRM ring manager In-Reply-To: <20170104143752.bl47gdfczbnfy6b3@rob-hp-laptop> References: <1483508082-7008-1-git-send-email-anup.patel@broadcom.com> <1483508082-7008-3-git-send-email-anup.patel@broadcom.com> <20170104143752.bl47gdfczbnfy6b3@rob-hp-laptop> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, Jan 4, 2017 at 8:07 PM, Rob Herring wrote: > On Wed, Jan 04, 2017 at 11:04:42AM +0530, Anup Patel wrote: >> This patch adds device tree bindings document for the FlexRM >> ring manager found on Broadcom iProc SoCs. >> >> Reviewed-by: Ray Jui >> Reviewed-by: Scott Branden >> Signed-off-by: Anup Patel >> --- >> .../bindings/mailbox/brcm,iproc-flexrm-mbox.txt | 60 ++++++++++++++++++++++ >> 1 file changed, 60 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt >> >> diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt >> new file mode 100644 >> index 0000000..ca51a39 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt >> @@ -0,0 +1,60 @@ >> +Broadcom FlexRM Ring Manager >> +============================ >> +The Broadcom FlexRM ring manager provides a set of rings which can be >> +used to submit work to offload engines. An SoC may have multiple FlexRM >> +hardware blocks. There is one device tree entry per FlexRM block. The >> +FlexRM driver will create a mailbox-controller instance for given FlexRM >> +hardware block where each mailbox channel is a separate FlexRM ring. >> + >> +Required properties: >> +-------------------- >> +- compatible: Should be "brcm,iproc-flexrm-mbox" >> +- reg: Specifies base physical address and size of the FlexRM >> + ring registers >> +- msi-parent: Phandles (and potential Device IDs) to MSI controllers >> + The FlexRM engine will send MSIs (instead of wired >> + interrupts) to CPU. There is one MSI for each FlexRM ring. >> + Refer devicetree/bindings/interrupt-controller/msi.txt >> +- #mbox-cells: Specifies the number of cells needed to encode a mailbox >> + channel. This should be 3. >> + >> + The 1st cell is the mailbox channel number. >> + >> + The 2nd cell contains MSI completion threshold. This is the >> + number of completion messages for which FlexRM will inject >> + one MSI interrupt to CPU. >> + >> + The 3nd cell contains MSI timer value representing time for >> + which FlexRM will wait to accumulate N completion messages >> + where N is the value specified by 2nd cell above. If FlexRM >> + does not get required number of completion messages in time >> + specified by this cell then it will inject one MSI interrupt >> + to CPU provided atleast one completion message is available. >> + >> +Optional properties: >> +-------------------- >> +- dma-coherent: Present if DMA operations made by the FlexRM engine (such >> + as DMA descriptor access, access to buffers pointed by DMA >> + descriptors and read/write pointer updates to DDR) are >> + cache coherent with the CPU. >> + >> +Example: >> +-------- >> +crypto_mbox: mbox at 67000000 { >> + compatible = "brcm,iproc-flexrm-mbox"; >> + reg = <0x67000000 0x200000>; >> + msi-parent = <&gic_its 0x7f00>; >> + #mbox-cells = <3>; >> +}; >> + >> +crypto_client { > > crypto@ > >> + ... >> + mboxes = <&crypto_mbox 0 0x1 0xffff>, >> + <&crypto_mbox 1 0x1 0xffff>, >> + <&crypto_mbox 16 0x1 0xffff>, >> + <&crypto_mbox 17 0x1 0xffff>, >> + <&crypto_mbox 30 0x1 0xffff>, >> + <&crypto_mbox 31 0x1 0xffff>; >> + }; >> + ... > > Please somewhat fully list the contents for node. > Sure, I will add more complete example DT node for mailbox client. Regards, Anup