From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anup Patel Subject: Re: [PATCH v2 2/5] async_tx: Handle DMA devices having support for fewer PQ coefficients Date: Tue, 7 Feb 2017 14:32:15 +0530 Message-ID: References: <1486455406-11202-1-git-send-email-anup.patel@broadcom.com> <1486455406-11202-3-git-send-email-anup.patel@broadcom.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: Mark Rutland , Device Tree , Herbert Xu , Scott Branden , Vinod Koul , Ray Jui , Jassi Brar , "linux-kernel@vger.kernel.org" , linux-raid , Jon Mason , Rob Herring , BCM Kernel Feedback , linux-crypto@vger.kernel.org, Rob Rice , "dmaengine@vger.kernel.org" , "David S . Miller" , "linux-arm-kernel@lists.infradead.org" To: Dan Williams Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org List-Id: linux-crypto.vger.kernel.org On Tue, Feb 7, 2017 at 1:57 PM, Dan Williams wrote: > On Tue, Feb 7, 2017 at 12:16 AM, Anup Patel wrote: >> The DMAENGINE framework assumes that if PQ offload is supported by a >> DMA device then all 256 PQ coefficients are supported. This assumption >> does not hold anymore because we now have BCM-SBA-RAID offload engine >> which supports PQ offload with limited number of PQ coefficients. >> >> This patch extends async_tx APIs to handle DMA devices with support >> for fewer PQ coefficients. >> >> Signed-off-by: Anup Patel >> Reviewed-by: Scott Branden > > I don't like this approach. Define an interface for md to query the > offload engine once at the beginning of time. We should not be adding > any new extensions to async_tx. Even if we do capability checks in Linux MD, we still need a way for DMAENGINE drivers to advertise number of PQ coefficients handled by the HW. I agree capability checks should be done once in Linux MD but I don't see why this has to be part of BCM-SBA-RAID driver patches. We need separate patchsets to address limitations of async_tx framework. Regards, Anup From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752789AbdBGJK1 (ORCPT ); Tue, 7 Feb 2017 04:10:27 -0500 Received: from mail-vk0-f47.google.com ([209.85.213.47]:34721 "EHLO mail-vk0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751872AbdBGJKZ (ORCPT ); Tue, 7 Feb 2017 04:10:25 -0500 MIME-Version: 1.0 In-Reply-To: References: <1486455406-11202-1-git-send-email-anup.patel@broadcom.com> <1486455406-11202-3-git-send-email-anup.patel@broadcom.com> From: Anup Patel Date: Tue, 7 Feb 2017 14:32:15 +0530 Message-ID: Subject: Re: [PATCH v2 2/5] async_tx: Handle DMA devices having support for fewer PQ coefficients To: Dan Williams Cc: Vinod Koul , Rob Herring , Mark Rutland , Herbert Xu , "David S . Miller" , Jassi Brar , Ray Jui , Scott Branden , Jon Mason , Rob Rice , BCM Kernel Feedback , "dmaengine@vger.kernel.org" , Device Tree , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , linux-crypto@vger.kernel.org, linux-raid Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 7, 2017 at 1:57 PM, Dan Williams wrote: > On Tue, Feb 7, 2017 at 12:16 AM, Anup Patel wrote: >> The DMAENGINE framework assumes that if PQ offload is supported by a >> DMA device then all 256 PQ coefficients are supported. This assumption >> does not hold anymore because we now have BCM-SBA-RAID offload engine >> which supports PQ offload with limited number of PQ coefficients. >> >> This patch extends async_tx APIs to handle DMA devices with support >> for fewer PQ coefficients. >> >> Signed-off-by: Anup Patel >> Reviewed-by: Scott Branden > > I don't like this approach. Define an interface for md to query the > offload engine once at the beginning of time. We should not be adding > any new extensions to async_tx. Even if we do capability checks in Linux MD, we still need a way for DMAENGINE drivers to advertise number of PQ coefficients handled by the HW. I agree capability checks should be done once in Linux MD but I don't see why this has to be part of BCM-SBA-RAID driver patches. We need separate patchsets to address limitations of async_tx framework. Regards, Anup From mboxrd@z Thu Jan 1 00:00:00 1970 From: anup.patel@broadcom.com (Anup Patel) Date: Tue, 7 Feb 2017 14:32:15 +0530 Subject: [PATCH v2 2/5] async_tx: Handle DMA devices having support for fewer PQ coefficients In-Reply-To: References: <1486455406-11202-1-git-send-email-anup.patel@broadcom.com> <1486455406-11202-3-git-send-email-anup.patel@broadcom.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, Feb 7, 2017 at 1:57 PM, Dan Williams wrote: > On Tue, Feb 7, 2017 at 12:16 AM, Anup Patel wrote: >> The DMAENGINE framework assumes that if PQ offload is supported by a >> DMA device then all 256 PQ coefficients are supported. This assumption >> does not hold anymore because we now have BCM-SBA-RAID offload engine >> which supports PQ offload with limited number of PQ coefficients. >> >> This patch extends async_tx APIs to handle DMA devices with support >> for fewer PQ coefficients. >> >> Signed-off-by: Anup Patel >> Reviewed-by: Scott Branden > > I don't like this approach. Define an interface for md to query the > offload engine once at the beginning of time. We should not be adding > any new extensions to async_tx. Even if we do capability checks in Linux MD, we still need a way for DMAENGINE drivers to advertise number of PQ coefficients handled by the HW. I agree capability checks should be done once in Linux MD but I don't see why this has to be part of BCM-SBA-RAID driver patches. We need separate patchsets to address limitations of async_tx framework. Regards, Anup