From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E382BC433EF for ; Sat, 25 Sep 2021 02:17:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CBB07610EA for ; Sat, 25 Sep 2021 02:17:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347397AbhIYCTH (ORCPT ); Fri, 24 Sep 2021 22:19:07 -0400 Received: from mail.kernel.org ([198.145.29.99]:53812 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343760AbhIYCTG (ORCPT ); Fri, 24 Sep 2021 22:19:06 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 0DC4461251; Sat, 25 Sep 2021 02:17:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1632536253; bh=D6mVq6Ws5LARrt0i89PJK+aDRPrFBg+LXJD8hpN1g/g=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=CViJisyPwkv5aUHbjwT60mL3x9qr1cZjSx1lpiNW8fc46hl26wDvn3hwTH0s+KQ9c txfOWQkvAjBtURVkGR4ZjryyWIceDcWsucyiUlxMDvl508YHexoHy90OLwRVl8gM8l 9GPIChPhvYNDHP00usmTuRefu1vYliyayBzpFmFDhEy6ttTGLo8uUd97PheGMy0Vvt HGIFndGKjusR3hsiAtKoYJQroKz9GiNUEmbYqynCOb77nOjxEEqsmMJh8avv/DRhaU Ja/TMzNE48rwBRoV+oI0+aJdhkQNQlTGgHazEuGxmbUzmgd8kUMzbKCiQmwq0r202s FjTkTPIJLKJSA== Received: by mail-ed1-f43.google.com with SMTP id bx4so43316973edb.4; Fri, 24 Sep 2021 19:17:32 -0700 (PDT) X-Gm-Message-State: AOAM532RCLuJKfOMwhxVW0fRqFE1g5Av8XcrNRh0qeBXGtQgX2K7ZeJ1 D4X+jCENny4fNHpp9QhC8UVLL22LYZnQAHDkEg== X-Google-Smtp-Source: ABdhPJy43x5ohkW8Db2PjWu46qMaTH2NqNO+cakkPZW/c2xsys2gf6YB/Ly9CvD7M2qmWakZbvEMWap8f0ltaHgNkUA= X-Received: by 2002:aa7:c617:: with SMTP id h23mr8737188edq.357.1632536251531; Fri, 24 Sep 2021 19:17:31 -0700 (PDT) MIME-Version: 1.0 References: <20210921155218.10387-1-jason-jh.lin@mediatek.com> <20210921155218.10387-6-jason-jh.lin@mediatek.com> In-Reply-To: <20210921155218.10387-6-jason-jh.lin@mediatek.com> From: Chun-Kuang Hu Date: Sat, 25 Sep 2021 10:17:20 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v11 05/16] dt-bindings: display: mediatek: merge: add additional prop for mt8195 To: "jason-jh.lin" Cc: Rob Herring , Matthias Brugger , Chun-Kuang Hu , Philipp Zabel , Enric Balletbo i Serra , Maxime Coquelin , David Airlie , Daniel Vetter , Alexandre Torgue , Hsin-Yi Wang , fshao@chromium.org, Moudy Ho , roy-cw.yeh@mediatek.com, Fabien Parent , Yongqiang Niu , Nancy Lin , singo.chang@mediatek.com, DTML , linux-stm32@st-md-mailman.stormreply.com, Linux ARM , "moderated list:ARM/Mediatek SoC support" , linux-kernel , DRI Development Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Jason: jason-jh.lin =E6=96=BC 2021=E5=B9=B49=E6=9C=882= 1=E6=97=A5 =E9=80=B1=E4=BA=8C =E4=B8=8B=E5=8D=8811:52=E5=AF=AB=E9=81=93=EF= =BC=9A > > add MERGE additional properties description for mt8195: > 1. async clock > 2. fifo setting enable > 3. reset controller > > Signed-off-by: jason-jh.lin > --- > .../display/mediatek/mediatek,merge.yaml | 31 +++++++++++++++++++ > 1 file changed, 31 insertions(+) > > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,= merge.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,me= rge.yaml > index 75beeb207ceb..542dd7137d3b 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.y= aml > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.y= aml > @@ -38,6 +38,19 @@ properties: > clocks: > items: > - description: MERGE Clock > + - description: MERGE Async Clock > + Controlling the synchronous process between MERGE and other di= splay > + function blocks cross clock domain. > + > + mediatek,merge-fifo-en: > + description: > + The setting of merge fifo is mainly provided for the display laten= cy > + buffer to ensure that the back-end panel display data will not be > + underrun, a little more data is needed in the fifo. > + According to the merge fifo settings, when the water level is dete= cted > + to be insufficient, it will trigger RDMA sending ultra and preulra > + command to SMI to speed up the data rate. > + type: boolean > > mediatek,gce-client-reg: > description: > @@ -50,6 +63,11 @@ properties: > $ref: /schemas/types.yaml#/definitions/phandle-array > maxItems: 1 > > + resets: > + description: reset controller > + See Documentation/devicetree/bindings/reset/reset.txt for details. > + maxItems: 1 > + > required: > - compatible > - reg > @@ -67,3 +85,16 @@ examples: > power-domains =3D <&spm MT8173_POWER_DOMAIN_MM>; > clocks =3D <&mmsys CLK_MM_DISP_MERGE>; > }; > + > + merge5: disp_vpp_merge5@1c110000 { > + compatible =3D "mediatek,mt8195-disp-merge"; > + reg =3D <0 0x1c110000 0 0x1000>; > + interrupts =3D ; > + clocks =3D <&vdosys1 CLK_VDO1_VPP_MERGE4>, > + <&vdosys1 CLK_VDO1_MERGE4_DL_ASYNC>; > + clock-names =3D "merge","merge_async"; Define clock-names first. Regards, Chun-Kuang. > + power-domains =3D <&spm MT8195_POWER_DOMAIN_VDOSYS1>; > + mediatek,gce-client-reg =3D <&gce1 SUBSYS_1c11XXXX 0x0000 0x1000= >; > + mediatek,merge-fifo-en =3D <1>; > + resets =3D <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE4_DL_ASYNC>; > + }; > -- > 2.18.0 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EAE54C433F5 for ; Sat, 25 Sep 2021 02:17:59 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B4E3661029 for ; Sat, 25 Sep 2021 02:17:59 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B4E3661029 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=n/l2Bse52NbIQuwr2+0d4fl/ltnXzo9hzCOCFDjhrHg=; b=Tvtn9l8ABuI5nu mLrOPIJcX6pvYK5uw4n4igc+X5v2+FnqCbbR1QrlBB8GSifYkk/A6kWLm6fPBduQBz5YkLf+Ei3wY BOQCEywpS9le0zQwwHmlem5qxbxKsVQzLNLXad+XrdygyU3lF7yi2tshRLj36cyUNMgjC4dcwcTIR 54AgERCBgF4jBtk+UGpH+DAea9pmPk9wZKrvm1/wv3/IJw3rl0VsFnOveOs0R8Tx1b9vdb+j9yqoq R2cc5IMUZ9rDxtlIhyblCKrXvLgykEFJ0dSflds4EyeZNQqgKMYYK6CW12nXoMmMeYe0DJFHGlFZ9 FesqAAIoaXMf89HDhZqQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mTxG8-00FyvN-0I; Sat, 25 Sep 2021 02:17:48 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mTxFt-00FytG-KC; Sat, 25 Sep 2021 02:17:36 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 1787261265; Sat, 25 Sep 2021 02:17:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1632536253; bh=D6mVq6Ws5LARrt0i89PJK+aDRPrFBg+LXJD8hpN1g/g=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=CViJisyPwkv5aUHbjwT60mL3x9qr1cZjSx1lpiNW8fc46hl26wDvn3hwTH0s+KQ9c txfOWQkvAjBtURVkGR4ZjryyWIceDcWsucyiUlxMDvl508YHexoHy90OLwRVl8gM8l 9GPIChPhvYNDHP00usmTuRefu1vYliyayBzpFmFDhEy6ttTGLo8uUd97PheGMy0Vvt HGIFndGKjusR3hsiAtKoYJQroKz9GiNUEmbYqynCOb77nOjxEEqsmMJh8avv/DRhaU Ja/TMzNE48rwBRoV+oI0+aJdhkQNQlTGgHazEuGxmbUzmgd8kUMzbKCiQmwq0r202s FjTkTPIJLKJSA== Received: by mail-ed1-f43.google.com with SMTP id y89so32418642ede.2; Fri, 24 Sep 2021 19:17:32 -0700 (PDT) X-Gm-Message-State: AOAM531JhEA5iIGMxjESHfnE0fXLVFS5wOrUwCJ1ELgHU2z15KlQOr0f 2SwfU7E345n1ZpjlrHhDMse0Si7B8lUogh7fyw== X-Google-Smtp-Source: ABdhPJy43x5ohkW8Db2PjWu46qMaTH2NqNO+cakkPZW/c2xsys2gf6YB/Ly9CvD7M2qmWakZbvEMWap8f0ltaHgNkUA= X-Received: by 2002:aa7:c617:: with SMTP id h23mr8737188edq.357.1632536251531; Fri, 24 Sep 2021 19:17:31 -0700 (PDT) MIME-Version: 1.0 References: <20210921155218.10387-1-jason-jh.lin@mediatek.com> <20210921155218.10387-6-jason-jh.lin@mediatek.com> In-Reply-To: <20210921155218.10387-6-jason-jh.lin@mediatek.com> From: Chun-Kuang Hu Date: Sat, 25 Sep 2021 10:17:20 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v11 05/16] dt-bindings: display: mediatek: merge: add additional prop for mt8195 To: "jason-jh.lin" Cc: Rob Herring , Matthias Brugger , Chun-Kuang Hu , Philipp Zabel , Enric Balletbo i Serra , Maxime Coquelin , David Airlie , Daniel Vetter , Alexandre Torgue , Hsin-Yi Wang , fshao@chromium.org, Moudy Ho , roy-cw.yeh@mediatek.com, Fabien Parent , Yongqiang Niu , Nancy Lin , singo.chang@mediatek.com, DTML , linux-stm32@st-md-mailman.stormreply.com, Linux ARM , "moderated list:ARM/Mediatek SoC support" , linux-kernel , DRI Development X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210924_191735_316705_8A354FF5 X-CRM114-Status: GOOD ( 16.97 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org SGksIEphc29uOgoKamFzb24tamgubGluIDxqYXNvbi1qaC5saW5AbWVkaWF0ZWsuY29tPiDmlrwg MjAyMeW5tDnmnIgyMeaXpSDpgLHkuowg5LiL5Y2IMTE6NTLlr6vpgZPvvJoKPgo+IGFkZCBNRVJH RSBhZGRpdGlvbmFsIHByb3BlcnRpZXMgZGVzY3JpcHRpb24gZm9yIG10ODE5NToKPiAxLiBhc3lu YyBjbG9jawo+IDIuIGZpZm8gc2V0dGluZyBlbmFibGUKPiAzLiByZXNldCBjb250cm9sbGVyCj4K PiBTaWduZWQtb2ZmLWJ5OiBqYXNvbi1qaC5saW4gPGphc29uLWpoLmxpbkBtZWRpYXRlay5jb20+ Cj4gLS0tCj4gIC4uLi9kaXNwbGF5L21lZGlhdGVrL21lZGlhdGVrLG1lcmdlLnlhbWwgICAgICB8 IDMxICsrKysrKysrKysrKysrKysrKysKPiAgMSBmaWxlIGNoYW5nZWQsIDMxIGluc2VydGlvbnMo KykKPgo+IGRpZmYgLS1naXQgYS9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvZGlz cGxheS9tZWRpYXRlay9tZWRpYXRlayxtZXJnZS55YW1sIGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0 cmVlL2JpbmRpbmdzL2Rpc3BsYXkvbWVkaWF0ZWsvbWVkaWF0ZWssbWVyZ2UueWFtbAo+IGluZGV4 IDc1YmVlYjIwN2NlYi4uNTQyZGQ3MTM3ZDNiIDEwMDY0NAo+IC0tLSBhL0RvY3VtZW50YXRpb24v ZGV2aWNldHJlZS9iaW5kaW5ncy9kaXNwbGF5L21lZGlhdGVrL21lZGlhdGVrLG1lcmdlLnlhbWwK PiArKysgYi9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvZGlzcGxheS9tZWRpYXRl ay9tZWRpYXRlayxtZXJnZS55YW1sCj4gQEAgLTM4LDYgKzM4LDE5IEBAIHByb3BlcnRpZXM6Cj4g ICAgY2xvY2tzOgo+ICAgICAgaXRlbXM6Cj4gICAgICAgIC0gZGVzY3JpcHRpb246IE1FUkdFIENs b2NrCj4gKyAgICAgIC0gZGVzY3JpcHRpb246IE1FUkdFIEFzeW5jIENsb2NrCj4gKyAgICAgICAg ICBDb250cm9sbGluZyB0aGUgc3luY2hyb25vdXMgcHJvY2VzcyBiZXR3ZWVuIE1FUkdFIGFuZCBv dGhlciBkaXNwbGF5Cj4gKyAgICAgICAgICBmdW5jdGlvbiBibG9ja3MgY3Jvc3MgY2xvY2sgZG9t YWluLgo+ICsKPiArICBtZWRpYXRlayxtZXJnZS1maWZvLWVuOgo+ICsgICAgZGVzY3JpcHRpb246 Cj4gKyAgICAgIFRoZSBzZXR0aW5nIG9mIG1lcmdlIGZpZm8gaXMgbWFpbmx5IHByb3ZpZGVkIGZv ciB0aGUgZGlzcGxheSBsYXRlbmN5Cj4gKyAgICAgIGJ1ZmZlciB0byBlbnN1cmUgdGhhdCB0aGUg YmFjay1lbmQgcGFuZWwgZGlzcGxheSBkYXRhIHdpbGwgbm90IGJlCj4gKyAgICAgIHVuZGVycnVu LCBhIGxpdHRsZSBtb3JlIGRhdGEgaXMgbmVlZGVkIGluIHRoZSBmaWZvLgo+ICsgICAgICBBY2Nv cmRpbmcgdG8gdGhlIG1lcmdlIGZpZm8gc2V0dGluZ3MsIHdoZW4gdGhlIHdhdGVyIGxldmVsIGlz IGRldGVjdGVkCj4gKyAgICAgIHRvIGJlIGluc3VmZmljaWVudCwgaXQgd2lsbCB0cmlnZ2VyIFJE TUEgc2VuZGluZyB1bHRyYSBhbmQgcHJldWxyYQo+ICsgICAgICBjb21tYW5kIHRvIFNNSSB0byBz cGVlZCB1cCB0aGUgZGF0YSByYXRlLgo+ICsgICAgdHlwZTogYm9vbGVhbgo+Cj4gICAgbWVkaWF0 ZWssZ2NlLWNsaWVudC1yZWc6Cj4gICAgICBkZXNjcmlwdGlvbjoKPiBAQCAtNTAsNiArNjMsMTEg QEAgcHJvcGVydGllczoKPiAgICAgICRyZWY6IC9zY2hlbWFzL3R5cGVzLnlhbWwjL2RlZmluaXRp b25zL3BoYW5kbGUtYXJyYXkKPiAgICAgIG1heEl0ZW1zOiAxCj4KPiArICByZXNldHM6Cj4gKyAg ICBkZXNjcmlwdGlvbjogcmVzZXQgY29udHJvbGxlcgo+ICsgICAgICBTZWUgRG9jdW1lbnRhdGlv bi9kZXZpY2V0cmVlL2JpbmRpbmdzL3Jlc2V0L3Jlc2V0LnR4dCBmb3IgZGV0YWlscy4KPiArICAg IG1heEl0ZW1zOiAxCj4gKwo+ICByZXF1aXJlZDoKPiAgICAtIGNvbXBhdGlibGUKPiAgICAtIHJl Zwo+IEBAIC02NywzICs4NSwxNiBAQCBleGFtcGxlczoKPiAgICAgICAgICBwb3dlci1kb21haW5z ID0gPCZzcG0gTVQ4MTczX1BPV0VSX0RPTUFJTl9NTT47Cj4gICAgICAgICAgY2xvY2tzID0gPCZt bXN5cyBDTEtfTU1fRElTUF9NRVJHRT47Cj4gICAgICB9Owo+ICsKPiArICAgIG1lcmdlNTogZGlz cF92cHBfbWVyZ2U1QDFjMTEwMDAwIHsKPiArICAgICAgICBjb21wYXRpYmxlID0gIm1lZGlhdGVr LG10ODE5NS1kaXNwLW1lcmdlIjsKPiArICAgICAgICByZWcgPSA8MCAweDFjMTEwMDAwIDAgMHgx MDAwPjsKPiArICAgICAgICBpbnRlcnJ1cHRzID0gPEdJQ19TUEkgNTA3IElSUV9UWVBFX0xFVkVM X0hJR0ggMD47Cj4gKyAgICAgICAgY2xvY2tzID0gPCZ2ZG9zeXMxIENMS19WRE8xX1ZQUF9NRVJH RTQ+LAo+ICsgICAgICAgICAgICAgICAgIDwmdmRvc3lzMSBDTEtfVkRPMV9NRVJHRTRfRExfQVNZ TkM+Owo+ICsgICAgICAgIGNsb2NrLW5hbWVzID0gIm1lcmdlIiwibWVyZ2VfYXN5bmMiOwoKRGVm aW5lIGNsb2NrLW5hbWVzIGZpcnN0LgoKUmVnYXJkcywKQ2h1bi1LdWFuZy4KCj4gKyAgICAgICAg cG93ZXItZG9tYWlucyA9IDwmc3BtIE1UODE5NV9QT1dFUl9ET01BSU5fVkRPU1lTMT47Cj4gKyAg ICAgICAgbWVkaWF0ZWssZ2NlLWNsaWVudC1yZWcgPSA8JmdjZTEgU1VCU1lTXzFjMTFYWFhYIDB4 MDAwMCAweDEwMDA+Owo+ICsgICAgICAgIG1lZGlhdGVrLG1lcmdlLWZpZm8tZW4gPSA8MT47Cj4g KyAgICAgICAgcmVzZXRzID0gPCZ2ZG9zeXMxIE1UODE5NV9WRE9TWVMxX1NXMF9SU1RfQl9NRVJH RTRfRExfQVNZTkM+Owo+ICsgICAgfTsKPiAtLQo+IDIuMTguMAo+CgpfX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpMaW51eC1tZWRpYXRlayBtYWlsaW5nIGxp c3QKTGludXgtbWVkaWF0ZWtAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFk ZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LW1lZGlhdGVrCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 056CBC433FE for ; Sat, 25 Sep 2021 02:17:36 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C7CD361029 for ; Sat, 25 Sep 2021 02:17:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org C7CD361029 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2A4C76E2D7; Sat, 25 Sep 2021 02:17:35 +0000 (UTC) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by gabe.freedesktop.org (Postfix) with ESMTPS id 383F86E2D7 for ; Sat, 25 Sep 2021 02:17:33 +0000 (UTC) Received: by mail.kernel.org (Postfix) with ESMTPSA id 0906A6125F for ; Sat, 25 Sep 2021 02:17:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1632536253; bh=D6mVq6Ws5LARrt0i89PJK+aDRPrFBg+LXJD8hpN1g/g=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=CViJisyPwkv5aUHbjwT60mL3x9qr1cZjSx1lpiNW8fc46hl26wDvn3hwTH0s+KQ9c txfOWQkvAjBtURVkGR4ZjryyWIceDcWsucyiUlxMDvl508YHexoHy90OLwRVl8gM8l 9GPIChPhvYNDHP00usmTuRefu1vYliyayBzpFmFDhEy6ttTGLo8uUd97PheGMy0Vvt HGIFndGKjusR3hsiAtKoYJQroKz9GiNUEmbYqynCOb77nOjxEEqsmMJh8avv/DRhaU Ja/TMzNE48rwBRoV+oI0+aJdhkQNQlTGgHazEuGxmbUzmgd8kUMzbKCiQmwq0r202s FjTkTPIJLKJSA== Received: by mail-ed1-f47.google.com with SMTP id ee50so43179475edb.13 for ; Fri, 24 Sep 2021 19:17:32 -0700 (PDT) X-Gm-Message-State: AOAM5339cHWaC/Ig1QMx8QpuToq8mznFS68FCelLDmrbRZ94aF10t4PY GhSQud1JGEtVOTjUyUcMn9HBNKksKOSegxTDlw== X-Google-Smtp-Source: ABdhPJy43x5ohkW8Db2PjWu46qMaTH2NqNO+cakkPZW/c2xsys2gf6YB/Ly9CvD7M2qmWakZbvEMWap8f0ltaHgNkUA= X-Received: by 2002:aa7:c617:: with SMTP id h23mr8737188edq.357.1632536251531; Fri, 24 Sep 2021 19:17:31 -0700 (PDT) MIME-Version: 1.0 References: <20210921155218.10387-1-jason-jh.lin@mediatek.com> <20210921155218.10387-6-jason-jh.lin@mediatek.com> In-Reply-To: <20210921155218.10387-6-jason-jh.lin@mediatek.com> From: Chun-Kuang Hu Date: Sat, 25 Sep 2021 10:17:20 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v11 05/16] dt-bindings: display: mediatek: merge: add additional prop for mt8195 To: "jason-jh.lin" Cc: Rob Herring , Matthias Brugger , Chun-Kuang Hu , Philipp Zabel , Enric Balletbo i Serra , Maxime Coquelin , David Airlie , Daniel Vetter , Alexandre Torgue , Hsin-Yi Wang , fshao@chromium.org, Moudy Ho , roy-cw.yeh@mediatek.com, Fabien Parent , Yongqiang Niu , Nancy Lin , singo.chang@mediatek.com, DTML , linux-stm32@st-md-mailman.stormreply.com, Linux ARM , "moderated list:ARM/Mediatek SoC support" , linux-kernel , DRI Development Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi, Jason: jason-jh.lin =E6=96=BC 2021=E5=B9=B49=E6=9C=882= 1=E6=97=A5 =E9=80=B1=E4=BA=8C =E4=B8=8B=E5=8D=8811:52=E5=AF=AB=E9=81=93=EF= =BC=9A > > add MERGE additional properties description for mt8195: > 1. async clock > 2. fifo setting enable > 3. reset controller > > Signed-off-by: jason-jh.lin > --- > .../display/mediatek/mediatek,merge.yaml | 31 +++++++++++++++++++ > 1 file changed, 31 insertions(+) > > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,= merge.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,me= rge.yaml > index 75beeb207ceb..542dd7137d3b 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.y= aml > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.y= aml > @@ -38,6 +38,19 @@ properties: > clocks: > items: > - description: MERGE Clock > + - description: MERGE Async Clock > + Controlling the synchronous process between MERGE and other di= splay > + function blocks cross clock domain. > + > + mediatek,merge-fifo-en: > + description: > + The setting of merge fifo is mainly provided for the display laten= cy > + buffer to ensure that the back-end panel display data will not be > + underrun, a little more data is needed in the fifo. > + According to the merge fifo settings, when the water level is dete= cted > + to be insufficient, it will trigger RDMA sending ultra and preulra > + command to SMI to speed up the data rate. > + type: boolean > > mediatek,gce-client-reg: > description: > @@ -50,6 +63,11 @@ properties: > $ref: /schemas/types.yaml#/definitions/phandle-array > maxItems: 1 > > + resets: > + description: reset controller > + See Documentation/devicetree/bindings/reset/reset.txt for details. > + maxItems: 1 > + > required: > - compatible > - reg > @@ -67,3 +85,16 @@ examples: > power-domains =3D <&spm MT8173_POWER_DOMAIN_MM>; > clocks =3D <&mmsys CLK_MM_DISP_MERGE>; > }; > + > + merge5: disp_vpp_merge5@1c110000 { > + compatible =3D "mediatek,mt8195-disp-merge"; > + reg =3D <0 0x1c110000 0 0x1000>; > + interrupts =3D ; > + clocks =3D <&vdosys1 CLK_VDO1_VPP_MERGE4>, > + <&vdosys1 CLK_VDO1_MERGE4_DL_ASYNC>; > + clock-names =3D "merge","merge_async"; Define clock-names first. Regards, Chun-Kuang. > + power-domains =3D <&spm MT8195_POWER_DOMAIN_VDOSYS1>; > + mediatek,gce-client-reg =3D <&gce1 SUBSYS_1c11XXXX 0x0000 0x1000= >; > + mediatek,merge-fifo-en =3D <1>; > + resets =3D <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE4_DL_ASYNC>; > + }; > -- > 2.18.0 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9166AC433EF for ; Sat, 25 Sep 2021 02:19:38 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5A474610EA for ; Sat, 25 Sep 2021 02:19:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 5A474610EA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=SEcZOtU0V2fzUN9crKhSlkOooYe3aJkELbpGqo72Et0=; b=ictEH9qse+uQmc U3W77XtT5oIPVh1xrgdNb5IsNuHKHRiRTfsJJOQ/Gz8e2xx2KFb5dXjY+oH1deLhhQ9Am5V93o1O2 PZ+4Wsq9M5y9GZoXkfDuXdxUCzp0wSHI1eHVbDW6C6L4lSk0kVp9i+9K4asDqO892K7h/UPkebsOT rTL0tjiFV+d5ZZf68fKqXSA6VN30r/F9FnnuJRkzlZE87YV/OQaJF67hcxDQGQDEQ3FZtt3kxiEwL MXEbfkB+qegi6093M1emTd/xF8x5hf0zcG9oKrx9rEEALJtkqQnbwAReWwlI0Wey3MiaU7lhe0ATT CUvTmXfWWzYSiCwATnHw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mTxFz-00FyuU-2h; Sat, 25 Sep 2021 02:17:39 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mTxFt-00FytG-KC; Sat, 25 Sep 2021 02:17:36 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 1787261265; Sat, 25 Sep 2021 02:17:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1632536253; bh=D6mVq6Ws5LARrt0i89PJK+aDRPrFBg+LXJD8hpN1g/g=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=CViJisyPwkv5aUHbjwT60mL3x9qr1cZjSx1lpiNW8fc46hl26wDvn3hwTH0s+KQ9c txfOWQkvAjBtURVkGR4ZjryyWIceDcWsucyiUlxMDvl508YHexoHy90OLwRVl8gM8l 9GPIChPhvYNDHP00usmTuRefu1vYliyayBzpFmFDhEy6ttTGLo8uUd97PheGMy0Vvt HGIFndGKjusR3hsiAtKoYJQroKz9GiNUEmbYqynCOb77nOjxEEqsmMJh8avv/DRhaU Ja/TMzNE48rwBRoV+oI0+aJdhkQNQlTGgHazEuGxmbUzmgd8kUMzbKCiQmwq0r202s FjTkTPIJLKJSA== Received: by mail-ed1-f43.google.com with SMTP id y89so32418642ede.2; Fri, 24 Sep 2021 19:17:32 -0700 (PDT) X-Gm-Message-State: AOAM531JhEA5iIGMxjESHfnE0fXLVFS5wOrUwCJ1ELgHU2z15KlQOr0f 2SwfU7E345n1ZpjlrHhDMse0Si7B8lUogh7fyw== X-Google-Smtp-Source: ABdhPJy43x5ohkW8Db2PjWu46qMaTH2NqNO+cakkPZW/c2xsys2gf6YB/Ly9CvD7M2qmWakZbvEMWap8f0ltaHgNkUA= X-Received: by 2002:aa7:c617:: with SMTP id h23mr8737188edq.357.1632536251531; Fri, 24 Sep 2021 19:17:31 -0700 (PDT) MIME-Version: 1.0 References: <20210921155218.10387-1-jason-jh.lin@mediatek.com> <20210921155218.10387-6-jason-jh.lin@mediatek.com> In-Reply-To: <20210921155218.10387-6-jason-jh.lin@mediatek.com> From: Chun-Kuang Hu Date: Sat, 25 Sep 2021 10:17:20 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v11 05/16] dt-bindings: display: mediatek: merge: add additional prop for mt8195 To: "jason-jh.lin" Cc: Rob Herring , Matthias Brugger , Chun-Kuang Hu , Philipp Zabel , Enric Balletbo i Serra , Maxime Coquelin , David Airlie , Daniel Vetter , Alexandre Torgue , Hsin-Yi Wang , fshao@chromium.org, Moudy Ho , roy-cw.yeh@mediatek.com, Fabien Parent , Yongqiang Niu , Nancy Lin , singo.chang@mediatek.com, DTML , linux-stm32@st-md-mailman.stormreply.com, Linux ARM , "moderated list:ARM/Mediatek SoC support" , linux-kernel , DRI Development X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210924_191735_316705_8A354FF5 X-CRM114-Status: GOOD ( 16.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org SGksIEphc29uOgoKamFzb24tamgubGluIDxqYXNvbi1qaC5saW5AbWVkaWF0ZWsuY29tPiDmlrwg MjAyMeW5tDnmnIgyMeaXpSDpgLHkuowg5LiL5Y2IMTE6NTLlr6vpgZPvvJoKPgo+IGFkZCBNRVJH RSBhZGRpdGlvbmFsIHByb3BlcnRpZXMgZGVzY3JpcHRpb24gZm9yIG10ODE5NToKPiAxLiBhc3lu YyBjbG9jawo+IDIuIGZpZm8gc2V0dGluZyBlbmFibGUKPiAzLiByZXNldCBjb250cm9sbGVyCj4K PiBTaWduZWQtb2ZmLWJ5OiBqYXNvbi1qaC5saW4gPGphc29uLWpoLmxpbkBtZWRpYXRlay5jb20+ Cj4gLS0tCj4gIC4uLi9kaXNwbGF5L21lZGlhdGVrL21lZGlhdGVrLG1lcmdlLnlhbWwgICAgICB8 IDMxICsrKysrKysrKysrKysrKysrKysKPiAgMSBmaWxlIGNoYW5nZWQsIDMxIGluc2VydGlvbnMo KykKPgo+IGRpZmYgLS1naXQgYS9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvZGlz cGxheS9tZWRpYXRlay9tZWRpYXRlayxtZXJnZS55YW1sIGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0 cmVlL2JpbmRpbmdzL2Rpc3BsYXkvbWVkaWF0ZWsvbWVkaWF0ZWssbWVyZ2UueWFtbAo+IGluZGV4 IDc1YmVlYjIwN2NlYi4uNTQyZGQ3MTM3ZDNiIDEwMDY0NAo+IC0tLSBhL0RvY3VtZW50YXRpb24v ZGV2aWNldHJlZS9iaW5kaW5ncy9kaXNwbGF5L21lZGlhdGVrL21lZGlhdGVrLG1lcmdlLnlhbWwK PiArKysgYi9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvZGlzcGxheS9tZWRpYXRl ay9tZWRpYXRlayxtZXJnZS55YW1sCj4gQEAgLTM4LDYgKzM4LDE5IEBAIHByb3BlcnRpZXM6Cj4g ICAgY2xvY2tzOgo+ICAgICAgaXRlbXM6Cj4gICAgICAgIC0gZGVzY3JpcHRpb246IE1FUkdFIENs b2NrCj4gKyAgICAgIC0gZGVzY3JpcHRpb246IE1FUkdFIEFzeW5jIENsb2NrCj4gKyAgICAgICAg ICBDb250cm9sbGluZyB0aGUgc3luY2hyb25vdXMgcHJvY2VzcyBiZXR3ZWVuIE1FUkdFIGFuZCBv dGhlciBkaXNwbGF5Cj4gKyAgICAgICAgICBmdW5jdGlvbiBibG9ja3MgY3Jvc3MgY2xvY2sgZG9t YWluLgo+ICsKPiArICBtZWRpYXRlayxtZXJnZS1maWZvLWVuOgo+ICsgICAgZGVzY3JpcHRpb246 Cj4gKyAgICAgIFRoZSBzZXR0aW5nIG9mIG1lcmdlIGZpZm8gaXMgbWFpbmx5IHByb3ZpZGVkIGZv ciB0aGUgZGlzcGxheSBsYXRlbmN5Cj4gKyAgICAgIGJ1ZmZlciB0byBlbnN1cmUgdGhhdCB0aGUg YmFjay1lbmQgcGFuZWwgZGlzcGxheSBkYXRhIHdpbGwgbm90IGJlCj4gKyAgICAgIHVuZGVycnVu LCBhIGxpdHRsZSBtb3JlIGRhdGEgaXMgbmVlZGVkIGluIHRoZSBmaWZvLgo+ICsgICAgICBBY2Nv cmRpbmcgdG8gdGhlIG1lcmdlIGZpZm8gc2V0dGluZ3MsIHdoZW4gdGhlIHdhdGVyIGxldmVsIGlz IGRldGVjdGVkCj4gKyAgICAgIHRvIGJlIGluc3VmZmljaWVudCwgaXQgd2lsbCB0cmlnZ2VyIFJE TUEgc2VuZGluZyB1bHRyYSBhbmQgcHJldWxyYQo+ICsgICAgICBjb21tYW5kIHRvIFNNSSB0byBz cGVlZCB1cCB0aGUgZGF0YSByYXRlLgo+ICsgICAgdHlwZTogYm9vbGVhbgo+Cj4gICAgbWVkaWF0 ZWssZ2NlLWNsaWVudC1yZWc6Cj4gICAgICBkZXNjcmlwdGlvbjoKPiBAQCAtNTAsNiArNjMsMTEg QEAgcHJvcGVydGllczoKPiAgICAgICRyZWY6IC9zY2hlbWFzL3R5cGVzLnlhbWwjL2RlZmluaXRp b25zL3BoYW5kbGUtYXJyYXkKPiAgICAgIG1heEl0ZW1zOiAxCj4KPiArICByZXNldHM6Cj4gKyAg ICBkZXNjcmlwdGlvbjogcmVzZXQgY29udHJvbGxlcgo+ICsgICAgICBTZWUgRG9jdW1lbnRhdGlv bi9kZXZpY2V0cmVlL2JpbmRpbmdzL3Jlc2V0L3Jlc2V0LnR4dCBmb3IgZGV0YWlscy4KPiArICAg IG1heEl0ZW1zOiAxCj4gKwo+ICByZXF1aXJlZDoKPiAgICAtIGNvbXBhdGlibGUKPiAgICAtIHJl Zwo+IEBAIC02NywzICs4NSwxNiBAQCBleGFtcGxlczoKPiAgICAgICAgICBwb3dlci1kb21haW5z ID0gPCZzcG0gTVQ4MTczX1BPV0VSX0RPTUFJTl9NTT47Cj4gICAgICAgICAgY2xvY2tzID0gPCZt bXN5cyBDTEtfTU1fRElTUF9NRVJHRT47Cj4gICAgICB9Owo+ICsKPiArICAgIG1lcmdlNTogZGlz cF92cHBfbWVyZ2U1QDFjMTEwMDAwIHsKPiArICAgICAgICBjb21wYXRpYmxlID0gIm1lZGlhdGVr LG10ODE5NS1kaXNwLW1lcmdlIjsKPiArICAgICAgICByZWcgPSA8MCAweDFjMTEwMDAwIDAgMHgx MDAwPjsKPiArICAgICAgICBpbnRlcnJ1cHRzID0gPEdJQ19TUEkgNTA3IElSUV9UWVBFX0xFVkVM X0hJR0ggMD47Cj4gKyAgICAgICAgY2xvY2tzID0gPCZ2ZG9zeXMxIENMS19WRE8xX1ZQUF9NRVJH RTQ+LAo+ICsgICAgICAgICAgICAgICAgIDwmdmRvc3lzMSBDTEtfVkRPMV9NRVJHRTRfRExfQVNZ TkM+Owo+ICsgICAgICAgIGNsb2NrLW5hbWVzID0gIm1lcmdlIiwibWVyZ2VfYXN5bmMiOwoKRGVm aW5lIGNsb2NrLW5hbWVzIGZpcnN0LgoKUmVnYXJkcywKQ2h1bi1LdWFuZy4KCj4gKyAgICAgICAg cG93ZXItZG9tYWlucyA9IDwmc3BtIE1UODE5NV9QT1dFUl9ET01BSU5fVkRPU1lTMT47Cj4gKyAg ICAgICAgbWVkaWF0ZWssZ2NlLWNsaWVudC1yZWcgPSA8JmdjZTEgU1VCU1lTXzFjMTFYWFhYIDB4 MDAwMCAweDEwMDA+Owo+ICsgICAgICAgIG1lZGlhdGVrLG1lcmdlLWZpZm8tZW4gPSA8MT47Cj4g KyAgICAgICAgcmVzZXRzID0gPCZ2ZG9zeXMxIE1UODE5NV9WRE9TWVMxX1NXMF9SU1RfQl9NRVJH RTRfRExfQVNZTkM+Owo+ICsgICAgfTsKPiAtLQo+IDIuMTguMAo+CgpfX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcg bGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmlu ZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0ta2VybmVsCg==