From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: MIME-Version: 1.0 References: <1558515574-11155-1-git-send-email-sagar.kadam@sifive.com> <1558515574-11155-4-git-send-email-sagar.kadam@sifive.com> <20190522194529.GJ7281@lunn.ch> In-Reply-To: <20190522194529.GJ7281@lunn.ch> From: Sagar Kadam Date: Thu, 23 May 2019 10:47:52 +0530 Message-ID: Subject: Re: [PATCH v7 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC. Content-Type: multipart/alternative; boundary="000000000000d322790589873467" To: Andrew Lunn Cc: Rob Herring , Mark Rutland , peter@korsgaard.com, Palmer Dabbelt , Paul Walmsley , Linux I2C , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org List-ID: --000000000000d322790589873467 Content-Type: text/plain; charset="UTF-8" On Thu, May 23, 2019 at 1:15 AM Andrew Lunn wrote: > On Wed, May 22, 2019 at 02:29:34PM +0530, Sagar Shrikant Kadam wrote: > > The i2c-ocore driver already has a polling mode interface.But it needs > > a workaround for FU540 Chipset on HiFive unleashed board (RevA00). > > There is an erratum in FU540 chip that prevents interrupt driven i2c > > transfers from working, and also the I2C controller's interrupt bit > > cannot be cleared if set, due to this the existing i2c polling mode > > interface added in mainline earlier doesn't work, and CPU stall's > > infinitely, when-ever i2c transfer is initiated. > > > > Ref: > > commit dd7dbf0eb090 ("i2c: ocores: refactor setup for polling") > > > > The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for > > FU540-COOO SoC. > > > > The polling function identifies a SiFive device based on the device node > > and enables the workaround. > > > > Signed-off-by: Sagar Shrikant Kadam > > Reviewed-by: Andrew Lunn > Thank you Andrew for reviewing the patch set. Can you please let me know weather you or Peter will be pick up the patch for v5.3 or they should go in via some other tree? > > Andrew > Thanks & Regards, Sagar --000000000000d322790589873467 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


=
On Thu, May 23, 2019 at 1:15 AM Andre= w Lunn <andrew@lunn.ch> wrote:<= br>
On Wed, May 22, = 2019 at 02:29:34PM +0530, Sagar Shrikant Kadam wrote:
> The i2c-ocore driver already has a polling mode interface.But it needs=
> a workaround for FU540 Chipset on HiFive unleashed board (RevA00).
> There is an erratum in FU540 chip that prevents interrupt driven i2c > transfers from working, and also the I2C controller's interrupt bi= t
> cannot be cleared if set, due to this the existing i2c polling mode > interface added in mainline earlier doesn't work, and CPU stall= 9;s
> infinitely, when-ever i2c transfer is initiated.
>
> Ref:
>=C2=A0 =C2=A0 =C2=A0 =C2=A0commit dd7dbf0eb090 ("i2c: ocores: refa= ctor setup for polling")
>
> The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for<= br> > FU540-COOO SoC.
>
> The polling function identifies a SiFive device based on the device no= de
> and enables the workaround.
>
> Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

Thank you = Andrew for reviewing the patch set.=C2=A0
Can you please let me k= now weather you or Peter will be pick up the patch for v5.3 or they=C2=A0= =C2=A0should go in via some other tree?
=C2=A0

=C2=A0 =C2=A0 Andrew
=C2=A0
Thanks & Reg= ards,
Sagar
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