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From: Ani Sinha <ani@anisinha.ca>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: mst@redhat.com, imammedo@redhat.com, jean-philippe@linaro.org,
	 qemu-devel@nongnu.org
Subject: Re: [PATCH 2/6] hw/acpi/viot: move the individual PCI host bridge entry generation to a new function
Date: Wed, 18 May 2022 17:19:18 +0530	[thread overview]
Message-ID: <CAARzgwy805i12i-n1qCu8PHGJLXKhFUazRcW9EMwGxztPqp8sw@mail.gmail.com> (raw)
In-Reply-To: <20220518110839.8681-3-mark.cave-ayland@ilande.co.uk>

On Wed, May 18, 2022 at 4:38 PM Mark Cave-Ayland
<mark.cave-ayland@ilande.co.uk> wrote:
>
> Instead of generating each table entry inline, move the individual PCI host bridge
> table entry generation to a separate build_pci_host_range() function.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

Reviewed-by: Ani Sinha <ani@anisinha.ca>


> ---
>  hw/acpi/viot.c | 48 +++++++++++++++++++++++++++---------------------
>  1 file changed, 27 insertions(+), 21 deletions(-)
>
> diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c
> index 2897aa8c88..662124812f 100644
> --- a/hw/acpi/viot.c
> +++ b/hw/acpi/viot.c
> @@ -16,6 +16,31 @@ struct viot_pci_ranges {
>      uint16_t output_node;
>  };
>
> +static void build_pci_host_range(GArray *table_data, int min_bus, int max_bus,
> +                                 uint16_t output_node)
> +{
> +    /* Type */
> +    build_append_int_noprefix(table_data, 1 /* PCI range */, 1);
> +    /* Reserved */
> +    build_append_int_noprefix(table_data, 0, 1);
> +    /* Length */
> +    build_append_int_noprefix(table_data, 24, 2);
> +    /* Endpoint start */
> +    build_append_int_noprefix(table_data, PCI_BUILD_BDF(min_bus, 0), 4);
> +    /* PCI Segment start */
> +    build_append_int_noprefix(table_data, 0, 2);
> +    /* PCI Segment end */
> +    build_append_int_noprefix(table_data, 0, 2);
> +    /* PCI BDF start */
> +    build_append_int_noprefix(table_data, PCI_BUILD_BDF(min_bus, 0), 2);
> +    /* PCI BDF end */
> +    build_append_int_noprefix(table_data, PCI_BUILD_BDF(max_bus, 0xff), 2);
> +    /* Output node */
> +    build_append_int_noprefix(table_data, output_node, 2);
> +    /* Reserved */
> +    build_append_int_noprefix(table_data, 0, 6);
> +}
> +
>  /* Build PCI range for a given PCI host bridge */
>  static int pci_host_bridges(Object *obj, void *opaque)
>  {
> @@ -30,27 +55,8 @@ static int pci_host_bridges(Object *obj, void *opaque)
>
>              pci_bus_range(bus, &min_bus, &max_bus);
>
> -            /* Type */
> -            build_append_int_noprefix(blob, 1 /* PCI range */, 1);
> -            /* Reserved */
> -            build_append_int_noprefix(blob, 0, 1);
> -            /* Length */
> -            build_append_int_noprefix(blob, 24, 2);
> -            /* Endpoint start */
> -            build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 4);
> -            /* PCI Segment start */
> -            build_append_int_noprefix(blob, 0, 2);
> -            /* PCI Segment end */
> -            build_append_int_noprefix(blob, 0, 2);
> -            /* PCI BDF start */
> -            build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 2);
> -            /* PCI BDF end */
> -            build_append_int_noprefix(blob, PCI_BUILD_BDF(max_bus, 0xff), 2);
> -            /* Output node */
> -            build_append_int_noprefix(blob, pci_ranges->output_node, 2);
> -            /* Reserved */
> -            build_append_int_noprefix(blob, 0, 6);
> -
> +            build_pci_host_range(blob, min_bus, max_bus,
> +                                 pci_ranges->output_node);
>              pci_ranges->count++;
>          }
>      }
> --
> 2.20.1
>


  reply	other threads:[~2022-05-18 12:02 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-18 11:08 [PATCH 0/6] hw/acpi/viot: generate stable VIOT ACPI tables Mark Cave-Ayland
2022-05-18 11:08 ` [PATCH 1/6] hw/acpi/viot: rename build_pci_range_node() to pci_host_bridges() Mark Cave-Ayland
2022-05-18 11:36   ` Ani Sinha
2022-05-18 12:27     ` Mark Cave-Ayland
2022-05-19  7:45       ` Ani Sinha
2022-05-22 13:49         ` Mark Cave-Ayland
2022-05-18 11:08 ` [PATCH 2/6] hw/acpi/viot: move the individual PCI host bridge entry generation to a new function Mark Cave-Ayland
2022-05-18 11:49   ` Ani Sinha [this message]
2022-05-18 11:08 ` [PATCH 3/6] hw/acpi/viot: build array of PCI host bridges before generating VIOT ACPI table Mark Cave-Ayland
2022-05-20 14:28   ` Ani Sinha
2022-05-22 22:11   ` Philippe Mathieu-Daudé via
2022-05-24 17:15     ` Mark Cave-Ayland
2022-05-18 11:08 ` [PATCH 4/6] tests/acpi: virt: allow VIOT acpi table changes Mark Cave-Ayland
2022-05-19  7:46   ` Ani Sinha
2022-05-18 11:08 ` [PATCH 5/6] hw/acpi/viot: sort VIOT ACPI table entries by PCI host bus min_bus Mark Cave-Ayland
2022-05-19  7:50   ` Ani Sinha
2022-05-22 13:59     ` Mark Cave-Ayland
2022-05-18 11:08 ` [PATCH 6/6] tests/acpi: virt: update golden masters for VIOT Mark Cave-Ayland
2022-05-22 22:13 ` [PATCH 0/6] hw/acpi/viot: generate stable VIOT ACPI tables Philippe Mathieu-Daudé via

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