From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_IN_DEF_DKIM_WL autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0D41C4338F for ; Sat, 31 Jul 2021 01:05:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B05DE60FED for ; Sat, 31 Jul 2021 01:05:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235396AbhGaBFQ (ORCPT ); Fri, 30 Jul 2021 21:05:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234862AbhGaBFO (ORCPT ); Fri, 30 Jul 2021 21:05:14 -0400 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C7B29C06175F for ; Fri, 30 Jul 2021 18:05:08 -0700 (PDT) Received: by mail-pj1-x1034.google.com with SMTP id nh14so5851169pjb.2 for ; Fri, 30 Jul 2021 18:05:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=7fCQsCvI2ERSkc9ox+/XNf66aLFSxrAJ6Aab87hhw0s=; b=X1ZVq0hpPSO5/Yd2KoFffT1sCZrD4/KqJLWniSqAunDAunqotTFNmgTlYx8KUSGe8m fPxlVyLQg40Wmttm/FuH4QmQ7tP+M366QBmOpPijlSr+alouiYwFqy6hq1pJWWjsmOA/ SmemNq1syXjJlBEzTC3ubhKa1Pgs2IvjsWnLiso57YSoLYU8wZn3Hg/yXPwQf6h0RpaN GHJPFsm79AznsUpLJSXojUVdKaGrKvdZQcB0RBSUNbJwxuTPuJRuc6uDpsEgP22Qjhh2 UD//jD0LgenwhRmsgQ7665zxDIsWvWtiiNvlB5W7XaTQwq68EQXW1Xa46KueX38SzbVT dd1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=7fCQsCvI2ERSkc9ox+/XNf66aLFSxrAJ6Aab87hhw0s=; b=fKy7PLSCx3uih4MgvEcMDHPVPTmG7uDR6zauL+bF5qVmhyhyNtQhAejYVxBfCd/t9w XfpGoDBndpQsI1f0wojvFRcrqWWZiRgVbr38FHQmyRDU4nHIRpjdJr2bhVODj8HaV+3N hJE07rKNYmC2brxfbU2vQMxniy+w4xL3lBRGrOziNwMRtl7fOa6OtQQsV/tzBjzUJt6k wgLsrzLQ7+Tngz8nhoBSpMOLDAWGeIaqY15Zsa5MAqJo+Ni4wyfm+5vSmrZLcLQtzbUD WUhbw2vmEVs9R7t7aNlY9V2VElkc1/OZ1IxqV5VmLU9k+1h+G67D9N5WPZIyHrY3Fe4l 6QzA== X-Gm-Message-State: AOAM533U779GHBuhhsx7F6VBP66DzYattoF6Xz8tMZhnqhi4snAwwpna mehmNjMTJOwfl5qW1OA/BP7zsiE7Gj8f0+SgsvmLzg== X-Google-Smtp-Source: ABdhPJwwGCDxYc0g7AC9UO9CQ7HbqhDlZ7Jx0scPAC9w4HO534gFU7sVhQvnq7/WEPE7IJoY5Kr1Dw+NQ0K9rCkHt/c= X-Received: by 2002:a17:90a:1b01:: with SMTP id q1mr5854899pjq.162.1627693508091; Fri, 30 Jul 2021 18:05:08 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Erdem Aktas Date: Fri, 30 Jul 2021 18:04:57 -0700 Message-ID: Subject: Re: [RFC PATCH v2 05/69] KVM: TDX: Add architectural definitions for structures and values To: "Yamahata, Isaku" Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H . Peter Anvin" , Paolo Bonzini , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , Connor Kuehl , Sean Christopherson , x86 , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, isaku.yamahata@gmail.com, Sean Christopherson , Kai Huang , Xiaoyao Li , Chao Gao Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jul 2, 2021 at 3:05 PM wrote: > +/* Management class fields */ > +enum tdx_guest_management { > + TD_VCPU_PEND_NMI = 11, > +}; > + > +/* @field is any of enum tdx_guest_management */ > +#define TDVPS_MANAGEMENT(field) BUILD_TDX_FIELD(32, (field)) I am a little confused with this. According to the spec, PEND_NMI has a field code of 0x200000000000000B I can understand that 0x20 is the class code and the PEND_NMI field code is 0xB. On the other hand, for the LAST_EXIT_TSC the field code is 0xA00000000000000A. Based on your code and the table in the spec, I can see that there is an additional mask (1ULL<<63) for readonly fields. Is this information correct and is this included in the spec? I tried to find it but somehow I do not see it clearly defined. > +#define TDX1_NR_TDCX_PAGES 4 > +#define TDX1_NR_TDVPX_PAGES 5 > + > +#define TDX1_MAX_NR_CPUID_CONFIGS 6 Why is this just 6? I am looking at the CPUID table in the spec and there are already more than 6 CPUID leaves there. > +#define TDX1_MAX_NR_CMRS 32 > +#define TDX1_MAX_NR_TDMRS 64 > +#define TDX1_MAX_NR_RSVD_AREAS 16 > +#define TDX1_PAMT_ENTRY_SIZE 16 > +#define TDX1_EXTENDMR_CHUNKSIZE 256 I believe all of the defined variables above need to be enumerated with TDH.SYS.INFO. > +#define TDX_TDMR_ADDR_ALIGNMENT 512 Is TDX_TDMR_ADDR_ALIGNMENT used anywhere or is it just for completeness? > +#define TDX_TDMR_INFO_ALIGNMENT 512 Why do we have alignment of 512, I am assuming to make it cache line size aligned for efficiency? > +#define TDX_TDSYSINFO_STRUCT_ALIGNEMNT 1024 typo: ALIGNEMNT -> ALIGNMENT -Erdem