From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_IN_DEF_DKIM_WL autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A57D4C433DB for ; Fri, 22 Jan 2021 17:51:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7A7E123A81 for ; Fri, 22 Jan 2021 17:51:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728567AbhAVRuW (ORCPT ); Fri, 22 Jan 2021 12:50:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729764AbhAVR3K (ORCPT ); Fri, 22 Jan 2021 12:29:10 -0500 Received: from mail-pf1-x431.google.com (mail-pf1-x431.google.com [IPv6:2607:f8b0:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D98D1C061793 for ; Fri, 22 Jan 2021 09:28:29 -0800 (PST) Received: by mail-pf1-x431.google.com with SMTP id u67so4231839pfb.3 for ; Fri, 22 Jan 2021 09:28:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=XBLvAtiLnkJxVcSWz7GN207iPLSO/HZW/o+U4RMk0/Q=; b=AhQAUJf/Huc7Sx9+gasWnXOK6+fmxnX9ZZPnoNJr0P8zj1jjZ8j6NviU51a/jJDLI0 YYAgX6p4vVFTKbEe7j1Cuy0hx8f3JOzBoIDcnpZQJo8RNRFiUqTNm+nFuGEegaWwxIIO 927eWIiQGv8sVLtbI0b+ZIiAejeh0WmWsr/qAiV1R/25Oh4FO5iP/Y6t0tpVTeBuaqPI 5ItVhmzTeOAAnOP2FZSF60y7ZsZ7MPzbH7FyQqzhQqKPVsdngyO67qrGDu2re1QZp5KQ w2JQoh/KwiEeZ1M681+56UgXGktKSIkLp2oYQcEKSzFgIdOoPxtKCmSZCnTI+MyCSd4n wgEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=XBLvAtiLnkJxVcSWz7GN207iPLSO/HZW/o+U4RMk0/Q=; b=Lx0qcuR5R+ajTZtsCgw/9qpa7gdxDgcxpmAgfUbVxtAr0Bwuk2qQEEl8lsealKJkl7 HTwQtTvXBQe5hgtHuAHKnnWLX2l3zRLXD320UaTZjpzt/lWQ7T7dOAP7VXawS70ekb1j I1dM5UTABumUxFpFD2NpdIJ2SBASIz6D7qS9w7KV+Ww7NB0PvAB2/0hyGv9anCqtxvFa 9zqATZYUxun/+Va7XgbdIVD/b6dMmcS1pUuiLcbFqLS3WDDYw1lRRFLoRIEGdAAm3eJQ 5Y7DedjPCKKylpp1xih3zH/rq1S+ZaUv8sPLCKViH86V47Ocm6MR9K+SXZ4ju2y8xtJW FdZA== X-Gm-Message-State: AOAM533cnGmTchuNt1pJbTE13TK76IHPPjXzNKs95/6mZbJ8U1dOEhsv 2miHOyISCpZwDUYe9ai4U9p7pbXCQaQJDM8sj8H9fg== X-Google-Smtp-Source: ABdhPJwu3Q+PW1QbrMHrU/9LmbGy0PCk43sALtPXsfqy7+jivTLvg+MYDWCQHK9E0YmC/swAXF67stsqdj2Udk9aU+8= X-Received: by 2002:a62:5c4:0:b029:1ba:9b0a:3166 with SMTP id 187-20020a6205c40000b02901ba9b0a3166mr5766157pff.55.1611336509247; Fri, 22 Jan 2021 09:28:29 -0800 (PST) MIME-Version: 1.0 References: <20200515171612.1020-1-catalin.marinas@arm.com> <20200515171612.1020-25-catalin.marinas@arm.com> <20210122144141.GE8567@gaia> In-Reply-To: <20210122144141.GE8567@gaia> From: Andrey Konovalov Date: Fri, 22 Jan 2021 18:28:18 +0100 Message-ID: Subject: Re: [PATCH v4 24/26] arm64: mte: Introduce early param to disable MTE support To: Andrey Konovalov Cc: Linux ARM , Linux Memory Management List , linux-arch , Will Deacon , Dave P Martin , Vincenzo Frascino , Szabolcs Nagy , Catalin Marinas , Kevin Brodsky , Peter Collingbourne Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org On Fri, Jan 22, 2021 at 3:41 PM Catalin Marinas wrote: > > > While this patch didn't land upstream, we need an MTE kill-switch for > > Android GKI. Is this patch OK to take as is? Is it still valid? > > As you noticed, this code no longer exists. The CPUID is checked early > during boot in proc.S, before the MMU is enabled, as you need to set up > the MAIR register. > > Now, what do you mean by kill switch? There are multiple levels at which > one can disable MTE or some of its effects: memory type (MAIR) level, > tag allocation (TCR_EL1.ATA), tag checking (SCTLR_EL1.TCF). Apart from > the latter, all the other bits are cached in the TLB which make them > more problematic to toggle at run-time. > > For the kernel, we can currently disable tag checking via the kasan > command line options. For user-space, we don't have a kill switch > specific to MTE, however one can disable the tagged addr ABI and > presumably the C library will avoid generating tagged heap pointers. Just FTR: As discussed off-the-list, there won't be any need for a kill-switch for userspace MTE. Thanks! From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_IN_DEF_DKIM_WL autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3257CC433DB for ; Fri, 22 Jan 2021 17:28:33 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 9D7B623A9A for ; Fri, 22 Jan 2021 17:28:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9D7B623A9A Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id BF75A6B0005; Fri, 22 Jan 2021 12:28:31 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id BA7546B0007; Fri, 22 Jan 2021 12:28:31 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id ABD296B0008; Fri, 22 Jan 2021 12:28:31 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0158.hostedemail.com [216.40.44.158]) by kanga.kvack.org (Postfix) with ESMTP id 968A76B0005 for ; Fri, 22 Jan 2021 12:28:31 -0500 (EST) Received: from smtpin13.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay01.hostedemail.com (Postfix) with ESMTP id 60ADF1801E31C for ; Fri, 22 Jan 2021 17:28:31 +0000 (UTC) X-FDA: 77734095222.13.feet81_4813f682756d Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin13.hostedemail.com (Postfix) with ESMTP id 3491A1814062D for ; Fri, 22 Jan 2021 17:28:31 +0000 (UTC) X-HE-Tag: feet81_4813f682756d X-Filterd-Recvd-Size: 4286 Received: from mail-pg1-f174.google.com (mail-pg1-f174.google.com [209.85.215.174]) by imf26.hostedemail.com (Postfix) with ESMTP for ; Fri, 22 Jan 2021 17:28:30 +0000 (UTC) Received: by mail-pg1-f174.google.com with SMTP id v19so4192093pgj.12 for ; Fri, 22 Jan 2021 09:28:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=XBLvAtiLnkJxVcSWz7GN207iPLSO/HZW/o+U4RMk0/Q=; b=AhQAUJf/Huc7Sx9+gasWnXOK6+fmxnX9ZZPnoNJr0P8zj1jjZ8j6NviU51a/jJDLI0 YYAgX6p4vVFTKbEe7j1Cuy0hx8f3JOzBoIDcnpZQJo8RNRFiUqTNm+nFuGEegaWwxIIO 927eWIiQGv8sVLtbI0b+ZIiAejeh0WmWsr/qAiV1R/25Oh4FO5iP/Y6t0tpVTeBuaqPI 5ItVhmzTeOAAnOP2FZSF60y7ZsZ7MPzbH7FyQqzhQqKPVsdngyO67qrGDu2re1QZp5KQ w2JQoh/KwiEeZ1M681+56UgXGktKSIkLp2oYQcEKSzFgIdOoPxtKCmSZCnTI+MyCSd4n wgEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=XBLvAtiLnkJxVcSWz7GN207iPLSO/HZW/o+U4RMk0/Q=; b=KKCdaYv0jAe8IyVu8H+plkHh0FKyi8ZfW74zn8yrfUPilMFbe+Wtm+91nhH9S+X/Va kIVHJ2CISZULKmd+9lkI0gorEjDqLezYYrt7lVJNPoCkwMHtpwjiRT9gUiJAeC92Metc dmCENJ2F9NNgVC6XQ3mn6rpQgVqAUR5lDQDw0/bMZToZXsXpCriNmxQaMT+U3pDpUhLh gcEM31tcd/ENsQxRwt9QeKQK5sWmH6ZVyIPhZs711v89TKiaw5bXK7dDkwHlCPu67/cS xk4pJ6/XAJGzkKHH4UQFuhqxDPCbU4yJZ+eo1IKmy34SIGIHf1Ie1CfIJMcfWyN0oBg1 kovw== X-Gm-Message-State: AOAM5311enh+9WL2oX8Mfzp/fhHq8X57Ll6TcbIw9uvJ19QynE5F5qCV TQPvQoXTDUUyEbqS0hC1dZQL1wtZxsJyeg5qK+w65g== X-Google-Smtp-Source: ABdhPJwu3Q+PW1QbrMHrU/9LmbGy0PCk43sALtPXsfqy7+jivTLvg+MYDWCQHK9E0YmC/swAXF67stsqdj2Udk9aU+8= X-Received: by 2002:a62:5c4:0:b029:1ba:9b0a:3166 with SMTP id 187-20020a6205c40000b02901ba9b0a3166mr5766157pff.55.1611336509247; Fri, 22 Jan 2021 09:28:29 -0800 (PST) MIME-Version: 1.0 References: <20200515171612.1020-1-catalin.marinas@arm.com> <20200515171612.1020-25-catalin.marinas@arm.com> <20210122144141.GE8567@gaia> In-Reply-To: <20210122144141.GE8567@gaia> From: Andrey Konovalov Date: Fri, 22 Jan 2021 18:28:18 +0100 Message-ID: Subject: Re: [PATCH v4 24/26] arm64: mte: Introduce early param to disable MTE support To: Andrey Konovalov Cc: Linux ARM , Linux Memory Management List , linux-arch , Will Deacon , Dave P Martin , Vincenzo Frascino , Szabolcs Nagy , Catalin Marinas , Kevin Brodsky , Peter Collingbourne Content-Type: text/plain; charset="UTF-8" X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Fri, Jan 22, 2021 at 3:41 PM Catalin Marinas wrote: > > > While this patch didn't land upstream, we need an MTE kill-switch for > > Android GKI. Is this patch OK to take as is? Is it still valid? > > As you noticed, this code no longer exists. The CPUID is checked early > during boot in proc.S, before the MMU is enabled, as you need to set up > the MAIR register. > > Now, what do you mean by kill switch? There are multiple levels at which > one can disable MTE or some of its effects: memory type (MAIR) level, > tag allocation (TCR_EL1.ATA), tag checking (SCTLR_EL1.TCF). Apart from > the latter, all the other bits are cached in the TLB which make them > more problematic to toggle at run-time. > > For the kernel, we can currently disable tag checking via the kasan > command line options. For user-space, we don't have a kill switch > specific to MTE, however one can disable the tagged addr ABI and > presumably the C library will avoid generating tagged heap pointers. Just FTR: As discussed off-the-list, there won't be any need for a kill-switch for userspace MTE. Thanks! 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Jan 22, 2021 at 3:41 PM Catalin Marinas wrote: > > > While this patch didn't land upstream, we need an MTE kill-switch for > > Android GKI. Is this patch OK to take as is? Is it still valid? > > As you noticed, this code no longer exists. The CPUID is checked early > during boot in proc.S, before the MMU is enabled, as you need to set up > the MAIR register. > > Now, what do you mean by kill switch? There are multiple levels at which > one can disable MTE or some of its effects: memory type (MAIR) level, > tag allocation (TCR_EL1.ATA), tag checking (SCTLR_EL1.TCF). Apart from > the latter, all the other bits are cached in the TLB which make them > more problematic to toggle at run-time. > > For the kernel, we can currently disable tag checking via the kasan > command line options. For user-space, we don't have a kill switch > specific to MTE, however one can disable the tagged addr ABI and > presumably the C library will avoid generating tagged heap pointers. Just FTR: As discussed off-the-list, there won't be any need for a kill-switch for userspace MTE. Thanks! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel