From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Goldschmidt Date: Tue, 8 Jan 2019 07:24:16 +0100 Subject: [U-Boot] [PATCH v1 1/4] arm: socfpga: imply SPL config instead of select In-Reply-To: <033b301a-612d-3b80-7ecc-04530851c1ec@denx.de> References: <20190107211423.10151-1-simon.k.r.goldschmidt@gmail.com> <20190107211423.10151-2-simon.k.r.goldschmidt@gmail.com> <033b301a-612d-3b80-7ecc-04530851c1ec@denx.de> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Mon, Jan 7, 2019 at 11:58 PM Marek Vasut wrote: > > On 1/7/19 10:14 PM, Simon Goldschmidt wrote: > > In order to build a smaller SPL, let's imply SPL_DM_RESET and > > SPL_WATCHDOG_SUPPORT instead of selecting them, so they can be disabled > > via defconfig. > > > > This also seems to be required to use OF_PLATDATA, as the reset drivers > > don't seem to work with it. > > How do you un-reset IP blocks if you disable the reset controller ? Here again, socfpga seems to be another bad example. Taking peripherals out of reset is cluttered throughout the mach-socfpga code at least in SPL. By now I know socfpga is lacking support for clock and reset management via devicetree. And this is bad, I know, but can we keep this a seperate issue from OF_PLATDATA? That being said, drivers/reset/reset-uclass.c fails to compile with OF_PLATDATA, so I guess this has not been used with OF_PLATDATA before. And given that I don't seem to need it for socfpga either, I don't think this would be the right series to fix that. Regards, Simon > > > Signed-off-by: Simon Goldschmidt > > --- > > > > arch/arm/Kconfig | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > > index 520ea8bed9..1ca71bd323 100644 > > --- a/arch/arm/Kconfig > > +++ b/arch/arm/Kconfig > > @@ -815,7 +815,6 @@ config ARCH_SOCFPGA > > select DM_SERIAL > > select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 > > select OF_CONTROL > > - select SPL_DM_RESET if DM_RESET > > select SPL_DM_SERIAL > > select SPL_LIBCOMMON_SUPPORT > > select SPL_LIBGENERIC_SUPPORT > > @@ -823,7 +822,6 @@ config ARCH_SOCFPGA > > select SPL_OF_CONTROL > > select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 > > select SPL_SERIAL_SUPPORT > > - select SPL_WATCHDOG_SUPPORT > > select SUPPORT_SPL > > select SYS_NS16550 > > select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 > > @@ -833,12 +831,14 @@ config ARCH_SOCFPGA > > imply DM_SPI > > imply DM_SPI_FLASH > > imply FAT_WRITE > > + imply SPL_DM_RESET > > imply SPL_LIBDISK_SUPPORT > > imply SPL_MMC_SUPPORT > > imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION > > imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE > > imply SPL_SPI_FLASH_SUPPORT > > imply SPL_SPI_SUPPORT > > + imply SPL_WATCHDOG_SUPPORT > > > > config ARCH_SUNXI > > bool "Support sunxi (Allwinner) SoCs" > > > > > -- > Best regards, > Marek Vasut