From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Goldschmidt Date: Mon, 7 Oct 2019 16:04:55 +0200 Subject: [U-Boot] [PATCH 3/8] ARM: socfpga: arria10: Add common u-boot devicetree include In-Reply-To: References: <20191004223043.18127-1-dalon.westergreen@linux.intel.com> <20191004223043.18127-4-dalon.westergreen@linux.intel.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Mon, Oct 7, 2019 at 3:38 PM Dalon L Westergreen wrote: > > On Sat, 2019-10-05 at 01:49 +0200, Marek Vasut wrote: > > On 10/5/19 12:30 AM, Dalon Westergreen wrote: > > From: Dalon Westergreen < > > dalon.westergreen at intel.com > > > > > > Add a common u-boot devicetree include file for the SocFPGA > > Arria10 device. > > > Isn't arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi doing basically > > the same thing, except more fine-grained ? > > > I wanted to keep the dts fragment dependent on the handoff header separate from the > generic base u-boot include. Hmm, ok, I see. Is it encouraged to add more header files in arch/arm/dts? If so, I wouldn't be too opposed on going that way for gen5 as well... Regards, Simon > > > diff --git a/arch/arm/dts/socfpga_arria10-common-u-boot.dtsi b/arch/arm/dts/socfpga_arria10-common-u-boot.dtsi > > new file mode 100644 > > index 0000000000..bd4f1271f3 > > --- /dev/null > > +++ b/arch/arm/dts/socfpga_arria10-common-u-boot.dtsi > > @@ -0,0 +1,206 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Copyright Altera Corporation (C) 2014. All rights reserved. > > + */ > > + > > +/ { > > + #address-cells = <1>; > > + #size-cells = <1>; > > + > > + chosen { > > + tick-timer = &timer2; > > + u-boot,dm-pre-reloc; > > + }; > > + > > + memory at 0 { > > + u-boot,dm-pre-reloc; > > + }; > > + > > + soc { > > + u-boot,dm-pre-reloc; > > + > > + clkmgr at ffd04000 { > > + u-boot,dm-pre-reloc; > > + > > + clocks { > > + u-boot,dm-pre-reloc; > > + > > + cb_intosc_hs_div2_clk { > > + u-boot,dm-pre-reloc; > > + }; > > + > > + cb_intosc_ls_clk { > > + u-boot,dm-pre-reloc; > > + }; > > + > > + f2s_free_clk { > > + u-boot,dm-pre-reloc; > > + }; > > + > > + osc1 { > > + u-boot,dm-pre-reloc; > > + }; > > + > > + main_pll at 40 { > > + u-boot,dm-pre-reloc; > > + > > + main_mpu_base_clk { > > + u-boot,dm-pre-reloc; > > + }; > > + > > + main_noc_base_clk { > > + u-boot,dm-pre-reloc; > > + }; > > + > > + main_emaca_clk at 68 { > > + u-boot,dm-pre-reloc; > > + }; > > > Do we really need all this in SPL for every board ?