From mboxrd@z Thu Jan  1 00:00:00 1970
From: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Date: Mon, 6 Aug 2018 15:39:31 +0200
Subject: [U-Boot] [PATCH 3/5] arm: socfpga: cyclone5: handle debug uart
In-Reply-To: <e8888876-03f6-b7eb-7ed4-93bc702ae564@denx.de>
References: <20180805193500.3693-1-simon.k.r.goldschmidt@gmail.com>
 <20180805193500.3693-4-simon.k.r.goldschmidt@gmail.com>
 <e8888876-03f6-b7eb-7ed4-93bc702ae564@denx.de>
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Marek Vasut <marex@denx.de> schrieb am Mo., 6. Aug. 2018, 15:19:

> On 08/05/2018 09:34 PM, Simon Goldschmidt wrote:
> > If CONFIG_DEBUG_UART is enabled, correctly initialize
> > the debug uart before console is initialized to debug
> > early boot problems in SPL.
> >
> > This also changes a printf in reset_manager_gen5 to
> > a debug to prevent calling into debug uart before it
> > is initialized.
> >
> > Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
> > ---
> >
> >  arch/arm/mach-socfpga/reset_manager_gen5.c | 5 +++--
> >  arch/arm/mach-socfpga/spl_gen5.c           | 6 ++++++
> >  2 files changed, 9 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c
> b/arch/arm/mach-socfpga/reset_manager_gen5.c
> > index 25baef79bc..3dfa09b742 100644
> > --- a/arch/arm/mach-socfpga/reset_manager_gen5.c
> > +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c
> > @@ -89,8 +89,9 @@ void socfpga_bridges_reset(int enable)
> >               /* Check signal from FPGA. */
> >               if (!fpgamgr_test_fpga_ready()) {
> >                       /* FPGA not ready, do nothing. We allow system to
> boot
> > -                      * without FPGA ready. So, return 0 instead of
> error. */
> > -                     printf("%s: FPGA not ready, aborting.\n",
> __func__);
> > +                      * without FPGA ready.
> > +                      */
> > +                     debug("%s: FPGA not ready, aborting.\n", __func__);
>
> This seems to be papering over some sort of problem with the debug UART.
>

You're right, it is papering over ns16550 debut uart staying in a tight
loop when printf is called before the debut uart is initialized.

This might be fixed by keeping & checking the init state of debut uart, but
does a global bool work for this in SPL?

I'd like to keep the print here, since it's a valid error, not a debug
> print.
>

As I see it, it's not a real error: my SPL always goes down this path as
the fpga is never initialized for me.

Note that booting from fpga doesn't work for me. That's a to-do on my
list...

Simon Goldschmidt


> >                       return;
> >               }
> >
> > diff --git a/arch/arm/mach-socfpga/spl_gen5.c
> b/arch/arm/mach-socfpga/spl_gen5.c
> > index 0d5526656d..0e685f6ee5 100644
> > --- a/arch/arm/mach-socfpga/spl_gen5.c
> > +++ b/arch/arm/mach-socfpga/spl_gen5.c
> > @@ -20,6 +20,7 @@
> >  #include <asm/arch/scu.h>
> >  #include <asm/arch/nic301.h>
> >  #include <asm/sections.h>
> > +#include <debug_uart.h>
> >  #include <fdtdec.h>
> >  #include <watchdog.h>
> >
> > @@ -153,6 +154,11 @@ void board_init_f(ulong dummy)
> >       /* unfreeze / thaw all IO banks */
> >       sys_mgr_frzctrl_thaw_req();
> >
> > +#ifdef CONFIG_DEBUG_UART
> > +     socfpga_per_reset(SOCFPGA_RESET(UART0), 0);
> > +     debug_uart_init();
> > +#endif
> > +
> >       ret = spl_early_init();
> >       if (ret) {
> >               debug("spl_early_init() failed: %d\n", ret);
> >
>
>
> --
> Best regards,
> Marek Vasut
>