From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anup Patel Date: Fri, 12 Jul 2019 14:09:22 +0530 Subject: [U-Boot] [PATCH v7 7/9] riscv: sifive: fu540: Setup ethaddr env variable using OTP In-Reply-To: References: <20190624040212.3726-1-anup.patel@wdc.com> <20190624040212.3726-8-anup.patel@wdc.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de On Thu, Jul 11, 2019 at 3:49 PM Ramon Fried wrote: > > > > On July 11, 2019 7:28:59 AM GMT+03:00, Anup Patel wrote: > > > > > >> -----Original Message----- > >> From: Troy Benjegerdes > >> Sent: Wednesday, July 10, 2019 10:45 PM > >> To: Anup Patel ; Sagar Karandikar > >> ; Joey Hewitt > >> Cc: Rick Chen ; Bin Meng ; > >> Lukas Auer ; Simon Glass > >> ; Ramon Fried ; Joe > >> Hershberger ; Palmer Dabbelt > >> ; Paul Walmsley ; Atish > >> Patra ; Alistair Francis > >; > >> U-Boot Mailing List > >> Subject: Re: [PATCH v7 7/9] riscv: sifive: fu540: Setup ethaddr env > >variable > >> using OTP > >> > >> > >> > >> > On Jun 23, 2019, at 11:03 PM, Anup Patel > >wrote: > >> > > >> > This patch extends SiFive FU540 board support to setup ethaddr env > >> > variable based on board serialnum read from OTP. > >> > > >> > Signed-off-by: Anup Patel > >> > --- > >> > board/sifive/fu540/fu540.c | 122 > >> +++++++++++++++++++++++++++++++++ > >> > configs/sifive_fu540_defconfig | 1 + > >> > 2 files changed, 123 insertions(+) > >> > > >> > diff --git a/board/sifive/fu540/fu540.c > >b/board/sifive/fu540/fu540.c > >> > index 5adc4a3d4a..11daf1a75a 100644 > >> > --- a/board/sifive/fu540/fu540.c > >> > +++ b/board/sifive/fu540/fu540.c > >> > @@ -8,6 +8,128 @@ > >> > > >> > #include > >> > #include > >> > +#include > >> > +#include > >> > + > >> > +#ifdef CONFIG_MISC_INIT_R > >> > + > >> > +#define FU540_OTP_BASE_ADDR 0x10070000 > >> > + > >> > +struct fu540_otp_regs { > >> > + u32 pa; /* Address input */ > >> > + u32 paio; /* Program address input */ > >> > + u32 pas; /* Program redundancy cell selection input */ > >> > + u32 pce; /* OTP Macro enable input */ > >> > + u32 pclk; /* Clock input */ > >> > + u32 pdin; /* Write data input */ > >> > + u32 pdout; /* Read data output */ > >> > + u32 pdstb; /* Deep standby mode enable input (active low) */ > >> > + u32 pprog; /* Program mode enable input */ > >> > + u32 ptc; /* Test column enable input */ > >> > + u32 ptm; /* Test mode enable input */ > >> > + u32 ptm_rep;/* Repair function test mode enable input */ > >> > + u32 ptr; /* Test row enable input */ > >> > + u32 ptrim; /* Repair function enable input */ > >> > + u32 pwe; /* Write enable input (defines program cycle) */ > >> > +} __packed; > >> > + > >> > +#define BYTES_PER_FUSE 4 > >> > +#define NUM_FUSES 0x1000 > >> > + > >> > +static int fu540_otp_read(int offset, void *buf, int size) { > >> > + struct fu540_otp_regs *regs = (void __iomem > >> *)FU540_OTP_BASE_ADDR; > >> > + unsigned int i; > >> > + int fuseidx = offset / BYTES_PER_FUSE; > >> > + int fusecount = size / BYTES_PER_FUSE; > >> > + u32 fusebuf[fusecount]; > >> > + > >> > + /* check bounds */ > >> > + if (offset < 0 || size < 0) > >> > + return -EINVAL; > >> > + if (fuseidx >= NUM_FUSES) > >> > + return -EINVAL; > >> > + if ((fuseidx + fusecount) > NUM_FUSES) > >> > + return -EINVAL; > >> > + > >> > + /* init OTP */ > >> > + writel(0x01, ®s->pdstb); /* wake up from stand-by */ > >> > + writel(0x01, ®s->ptrim); /* enable repair function */ > >> > + writel(0x01, ®s->pce); /* enable input */ > >> > + > >> > + /* read all requested fuses */ > >> > + for (i = 0; i < fusecount; i++, fuseidx++) { > >> > + writel(fuseidx, ®s->pa); > >> > + > >> > + /* cycle clock to read */ > >> > + writel(0x01, ®s->pclk); > >> > + mdelay(1); > >> > + writel(0x00, ®s->pclk); > >> > + mdelay(1); > >> > + > >> > + /* read the value */ > >> > + fusebuf[i] = readl(®s->pdout); > >> > + } > >> > + > >> > + /* shut down */ > >> > + writel(0, ®s->pce); > >> > + writel(0, ®s->ptrim); > >> > + writel(0, ®s->pdstb); > >> > + > >> > + /* copy out */ > >> > + memcpy(buf, fusebuf, size); > >> > + > >> > + return 0; > >> > +} > >> > + > >> > +static u32 fu540_read_serialnum(void) { > >> > + int ret; > >> > + u32 serial[2] = {0}; > >> > + > >> > + for (int i = 0xfe * 4; i > 0; i -= 8) { > >> > + ret = fu540_otp_read(i, serial, sizeof(serial)); > >> > + if (ret) { > >> > + printf("%s: error reading from OTP\n", __func__); > >> > + break; > >> > + } > >> > + if (serial[0] == ~serial[1]) > >> > + return serial[0]; > >> > + } > >> > + > >> > + return 0; > >> > +} > >> > >> Please take a look at the DM-enabled SiFive OTP driver submitted by > >Joey > >> Hewitt at https://github.com/sifive/HiFive_U- > >> Boot/commit/6d842765de142b61f847852da7a9ce0d081d770c > >> > >> This Joey's version also sets the ‘serial#’ environment variable, > >while this > >> patch only sets ‘ethaddr' > > > >I am not sure if "serial#" environment variable is a standard U-Boot > >way of advertising serial number of underlying Host. > it's standard. > > > >Where is this used? > looks at fastboot for instance. it uses this env for the USB serial. Sure, this can be added as a separate patch. It's not related to what this patch is trying to do. Regards, Anup