From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anup Patel Date: Wed, 6 Mar 2019 17:19:48 +0530 Subject: [U-Boot] [PATCH v2 0/9] SMP support for RISC-V In-Reply-To: References: <20190305225331.1353-1-lukas.auer@aisec.fraunhofer.de> <43f4d91c1ae43e5eea5222ad15c2671a6421866f.camel@aisec.fraunhofer.de> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable To: u-boot@lists.denx.de On Wed, Mar 6, 2019 at 5:17 PM Andreas Schwab wrote: > > On M=C3=A4r 06 2019, Anup Patel wrote: > > >> -----Original Message----- > >> From: Andreas Schwab > >> Sent: Wednesday, March 6, 2019 4:27 PM > >> To: Anup Patel > >> Cc: Auer, Lukas ; u-boot at lists.denx= .de; > >> paul.walmsley at sifive.com; agraf at suse.de; anup at brainfault.org; > >> baruch at tkos.co.il; daniel.schwierzeck at gmail.com; bmeng.cn at gma= il.com; > >> rick at andestech.com; sr at denx.de; palmer at sifive.com; Atish Patra > >> > >> Subject: Re: [PATCH v2 0/9] SMP support for RISC-V > >> > >> Apparently sometimes u-boot tries to boot the kernel on heart 0 (the E= 51 > >> core), which will then fail to start userspace, since that cannot cope= with the > >> missing fpu. > > > > That's not possible > > Yes, it is. > > > OpenSBI v0.3 (Mar 6 2019 10:55:01) > ____ _____ ____ _____ > / __ \ / ____| _ \_ _| > | | | |_ __ ___ _ __ | (___ | |_) || | > | | | | '_ \ / _ \ '_ \ \___ \| _ < | | > | |__| | |_) | __/ | | |____) | |_) || |_ > \____/| .__/ \___|_| |_|_____/|____/_____| > | | > |_| > > Platform Name : SiFive Freedom U540 > Platform HART Features : RV64ACDFIMSU > Platform Max HARTs : 5 > Current Hart : 2 > Firmware Base : 0x80000000 > Firmware Size : 88 KB > Runtime SBI Version : 0.1 > > PMP0: 0x0000000080000000-0x000000008001ffff (A) > PMP1: 0x0000000000000000-0x0000007fffffffff (A,R,W,X) > > > U-Boot 2019.04-rc3-00010-g3ea5582c09 (Mar 06 2019 - 10:06:10 +0100) > > CPU: rv64imac > Model: sifive,hifive-unleashed-a00 > DRAM: 8 GiB How does this prove that U-Boot is booting on HART 0? This seems to be warm reset issues for which fixes from Atish are not yet merged. Regards, Anup