From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC9CBC433FE for ; Wed, 8 Sep 2021 08:38:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 907006108D for ; Wed, 8 Sep 2021 08:38:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348311AbhIHIjY (ORCPT ); Wed, 8 Sep 2021 04:39:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348087AbhIHIjS (ORCPT ); Wed, 8 Sep 2021 04:39:18 -0400 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6E0DC061575 for ; Wed, 8 Sep 2021 01:38:10 -0700 (PDT) Received: by mail-wm1-x334.google.com with SMTP id u15-20020a05600c19cf00b002f6445b8f55so908425wmq.0 for ; Wed, 08 Sep 2021 01:38:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=5ILfedyfA7TPHqyBNZ/TjjapMKjWfHALaRNb6+vus4M=; b=Rq63Ukeo3zhZYJb8DfVPuJ+ZlafG0bW4jpUJ1nH3k2einUu+O2DnOkh+2CfpepE9J6 XwQkWvMFO7wVfanY7uSCHAm5kgetmsk4r6nnx3ddUx5lWpBhVFBRn4od9nLyt9ECjaq2 IEsndYP4HmZpynv/GMLu58l4z4j4pTKXwU5VblnNl4nF1tSFe80p215ojNzp0+lDLfyg p418iVjoASz1D43D2gmR2MIVpTFRyspYOLLrlMJrHNwlb61kWKxcL1L3Do4h/NOyH0ZW 9viKhye+u9e4BuQdJMZsD1O+4NgOtmX3SDD2YVR/pjISSYrhrgpczfFW8KRjeM9lM9lI al+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=5ILfedyfA7TPHqyBNZ/TjjapMKjWfHALaRNb6+vus4M=; b=UN4nUsRFILrlBYuijoQmDbqp1/++r7tfz3haIiBmmJGsC8s+jSEDTKepJIdRdB0ezY PF0+JobydvfxOh+OsqS07+L5IuX0Jy7UuBTFENZFs/W1wszYv62BkCdDiMqOyxi4jnrc XFbl1ibPbWo/VjB+zTNZJUQ/cBHhtxIATVrDsLom9AxjpDH0wU+jEdyN3RswCNVMMidR fx0p05Z5gVEQXaNnFbPy/nzl1aSN2x+7vqng9fHX77caZQTS4/s3GYSWweJS4hGhBHDw klf7OwGoGKoPJlFm2Y9ZmufiZo0rCPHNFJCrsbt82VdK/xFdSC0A+L8kWWuK5IJ0XRuT JHVw== X-Gm-Message-State: AOAM5317hwd1OK5pTbpJEEVgGbbirERRT6FcIXKjqTuyaE7eHGSjp2zZ Zf1VFZIrmdEHfqInwzQvefToDTn117y/2ton4mCDjnW40tE= X-Google-Smtp-Source: ABdhPJwTLSIAXa5bFuTiTTMynzBXUStSpSK/LG8Y7aRLbOSUVFSSUxJSmAev5mr9BMod3NxrEem3HLc3DORSEKl0b4g= X-Received: by 2002:a7b:cc14:: with SMTP id f20mr2288363wmh.137.1631090289364; Wed, 08 Sep 2021 01:38:09 -0700 (PDT) MIME-Version: 1.0 References: <20210726112511.78350-1-xypron.glpk@gmx.de> In-Reply-To: <20210726112511.78350-1-xypron.glpk@gmx.de> From: Anup Patel Date: Wed, 8 Sep 2021 14:07:57 +0530 Message-ID: Subject: Re: [PATCH 1/2] riscv: defconfig: enable BLK_DEV_NVME To: Heinrich Schuchardt Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Heinrich Schuchardt , Atish Patra , Anup Patel , Emil Renner Berthing , Sagar Shrikant Kadam , linux-riscv , "linux-kernel@vger.kernel.org List" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jul 26, 2021 at 4:55 PM Heinrich Schuchardt wrote: > > NVMe is a non-volatile storage media attached via PCIe. > As NVMe has much higher throughput than other block devices like > SATA it is a must have for RISC-V. Enable CONFIG_BLK_DEV_NVME. > > The HiFive Unmatched is a board providing M.2 slots for NVMe drives. > Enable CONFIG_PCIE_FU740. > > Signed-off-by: Heinrich Schuchardt Looks good to me. Reviewed-by: Anup Patel Regards, Anup > --- > arch/riscv/configs/defconfig | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig > index 1f2be234b11c..393bf3843e5c 100644 > --- a/arch/riscv/configs/defconfig > +++ b/arch/riscv/configs/defconfig > @@ -39,10 +39,12 @@ CONFIG_PCI=y > CONFIG_PCIEPORTBUS=y > CONFIG_PCI_HOST_GENERIC=y > CONFIG_PCIE_XILINX=y > +CONFIG_PCIE_FU740=y > CONFIG_DEVTMPFS=y > CONFIG_DEVTMPFS_MOUNT=y > CONFIG_BLK_DEV_LOOP=y > CONFIG_VIRTIO_BLK=y > +CONFIG_BLK_DEV_NVME=m > CONFIG_BLK_DEV_SD=y > CONFIG_BLK_DEV_SR=y > CONFIG_SCSI_VIRTIO=y > -- > 2.30.2 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD307C433EF for ; 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Wed, 08 Sep 2021 01:38:09 -0700 (PDT) MIME-Version: 1.0 References: <20210726112511.78350-1-xypron.glpk@gmx.de> In-Reply-To: <20210726112511.78350-1-xypron.glpk@gmx.de> From: Anup Patel Date: Wed, 8 Sep 2021 14:07:57 +0530 Message-ID: Subject: Re: [PATCH 1/2] riscv: defconfig: enable BLK_DEV_NVME To: Heinrich Schuchardt Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Heinrich Schuchardt , Atish Patra , Anup Patel , Emil Renner Berthing , Sagar Shrikant Kadam , linux-riscv , "linux-kernel@vger.kernel.org List" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210908_013810_967146_3331C22B X-CRM114-Status: GOOD ( 13.97 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Jul 26, 2021 at 4:55 PM Heinrich Schuchardt wrote: > > NVMe is a non-volatile storage media attached via PCIe. > As NVMe has much higher throughput than other block devices like > SATA it is a must have for RISC-V. Enable CONFIG_BLK_DEV_NVME. > > The HiFive Unmatched is a board providing M.2 slots for NVMe drives. > Enable CONFIG_PCIE_FU740. > > Signed-off-by: Heinrich Schuchardt Looks good to me. Reviewed-by: Anup Patel Regards, Anup > --- > arch/riscv/configs/defconfig | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig > index 1f2be234b11c..393bf3843e5c 100644 > --- a/arch/riscv/configs/defconfig > +++ b/arch/riscv/configs/defconfig > @@ -39,10 +39,12 @@ CONFIG_PCI=y > CONFIG_PCIEPORTBUS=y > CONFIG_PCI_HOST_GENERIC=y > CONFIG_PCIE_XILINX=y > +CONFIG_PCIE_FU740=y > CONFIG_DEVTMPFS=y > CONFIG_DEVTMPFS_MOUNT=y > CONFIG_BLK_DEV_LOOP=y > CONFIG_VIRTIO_BLK=y > +CONFIG_BLK_DEV_NVME=m > CONFIG_BLK_DEV_SD=y > CONFIG_BLK_DEV_SR=y > CONFIG_SCSI_VIRTIO=y > -- > 2.30.2 > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv