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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Huacai Chen , Thomas Huth , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , QEMU Developers , Aleksandar Markovic , Aleksandar Rikalo , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi, Thomas and Aleksandar, On Tue, Jun 16, 2020 at 3:45 AM Aleksandar Markovic wrote: > > On Mon, Jun 15, 2020 at 10:55 AM Thomas Huth wrote: > > > > On 15/06/2020 02.52, Huacai Chen wrote: > > > Hi, Aleksandar, > > > > > > On Sun, Jun 14, 2020 at 4:07 PM Aleksandar Markovic > > > wrote: > > >> > > >> > > >> > > >> =D1=83=D1=82=D0=BE, 2. =D1=98=D1=83=D0=BD 2020. =D1=83 04:38 Huacai = Chen =D1=98=D0=B5 =D0=BD=D0=B0=D0=BF=D0=B8=D1=81=D0= =B0=D0=BE/=D0=BB=D0=B0: > > >>> > > >>> MIPS has two types of KVM: TE & VZ, and TE is the default type. Now= we > > >>> can't create a VZ guest in QEMU because it lacks the kvm_type() hoo= k in > > >>> MachineClass. Besides, libvirt uses a null-machine to detect the kv= m > > >>> capability, so by default it will return "KVM not supported" on a V= Z > > >>> platform. Thus, null-machine also need the kvm_type() hook. > > >>> > > >>> Reviewed-by: Aleksandar Markovic > > >>> Signed-off-by: Huacai Chen > > >>> Co-developed-by: Jiaxun Yang > > >>> --- > > >> > > >> Huacai, > > >> > > >> Please take a look at Peter's remarks at: > > >> > > >> https://lists.gnu.org/archive/html/qemu-devel/2020-06/msg01878.html > > >> > > >> ...and refactor this patch for v5. My general advice: The simpler, t= he batter. > > >> > > > OK, I will rework this patch. > > > > Hi, > > > > is there maybe also a way to do this without moving null-machine.o from > > common-obj-y to obj-y, and to avoid the target-specific hacks in this > > file ? We just moved the null-machine from obj-y to common-obj-y two > > years ago (see commit 3858ff763985fb9e), since it's more desirable to > > have as much code in common-obj to save compilation time and maybe to b= e > > able to link a qemu with more than one target CPU in one binary one day= ... > > > > ppc64 has also more than one kvm_type (kvm-hv and kvm-pr), and > > apparently it also works without hacks to the null-machine code there > > ... so maybe you can peek into the ppc64 code to see how it is solved t= here? > > > > Hi, Huacai, > > I think the optimal outcome for this release of QEMU would be if you > drop support for VZ. I think your scenario could work without VZ, > couldn't it? > > This is a fairly complex thing, and, as you see, it is a little > intrusive, it could negatively impact other targets. With enough > development time, you can easily provide that support in 5.2. - but > now we are close to 5.1 softfreeze. > > Even without VZ support, I would consider your contribution the most > significant for MIPS target in last two years, at least - a giant step > ahead! There are two problems: 1, qemu need kvm_type() to create a normal KVM guest. 2, libvirt use the null-machine to detect the KVM capability. For the first problem, just provide a kvm_type() hook for MIPS is enough, which is similar to ppc64. For the second problem, I think libvirt is also unable to detect the KVM capabilty on ppc64, unless ppc64 do the same hack on null-machine. V5 of this patch will only provide kvm_type() for MIPS (not hack null-machine.c), but all of us should think how to solve the second problem. Huacai > > Best Regards, > Aleksandar > > > Thomas > > > > > > >>> hw/core/Makefile.objs | 2 +- > > >>> hw/core/null-machine.c | 4 ++++ > > >>> hw/mips/Makefile.objs | 2 +- > > >>> hw/mips/common.c | 42 ++++++++++++++++++++++++++++++++++++++= ++++ > > >>> include/hw/mips/mips.h | 3 +++ > > >>> 5 files changed, 51 insertions(+), 2 deletions(-) > > >>> create mode 100644 hw/mips/common.c > > >>> > > >>> diff --git a/hw/core/Makefile.objs b/hw/core/Makefile.objs > > >>> index 1d540ed..b5672f4 100644 > > >>> --- a/hw/core/Makefile.objs > > >>> +++ b/hw/core/Makefile.objs > > >>> @@ -17,11 +17,11 @@ common-obj-$(CONFIG_SOFTMMU) +=3D vm-change-sta= te-handler.o > > >>> common-obj-$(CONFIG_SOFTMMU) +=3D qdev-properties-system.o > > >>> common-obj-$(CONFIG_SOFTMMU) +=3D sysbus.o > > >>> common-obj-$(CONFIG_SOFTMMU) +=3D machine.o > > >>> -common-obj-$(CONFIG_SOFTMMU) +=3D null-machine.o > > >>> common-obj-$(CONFIG_SOFTMMU) +=3D loader.o > > >>> common-obj-$(CONFIG_SOFTMMU) +=3D machine-hmp-cmds.o > > >>> common-obj-$(CONFIG_SOFTMMU) +=3D numa.o > > >>> common-obj-$(CONFIG_SOFTMMU) +=3D clock-vmstate.o > > >>> +obj-$(CONFIG_SOFTMMU) +=3D null-machine.o > > >>> obj-$(CONFIG_SOFTMMU) +=3D machine-qmp-cmds.o > > >>> > > >>> common-obj-$(CONFIG_EMPTY_SLOT) +=3D empty_slot.o > > >>> diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c > > >>> index cb47d9d..94a36f9 100644 > > >>> --- a/hw/core/null-machine.c > > >>> +++ b/hw/core/null-machine.c > > >>> @@ -17,6 +17,7 @@ > > >>> #include "sysemu/sysemu.h" > > >>> #include "exec/address-spaces.h" > > >>> #include "hw/core/cpu.h" > > >>> +#include "hw/mips/mips.h" > > >>> > > >>> static void machine_none_init(MachineState *mch) > > >>> { > > >>> @@ -50,6 +51,9 @@ static void machine_none_machine_init(MachineClas= s *mc) > > >>> mc->max_cpus =3D 1; > > >>> mc->default_ram_size =3D 0; > > >>> mc->default_ram_id =3D "ram"; > > >>> +#ifdef TARGET_MIPS > > >>> + mc->kvm_type =3D mips_kvm_type; > > >>> +#endif > > >>> } > > >>> > > >>> DEFINE_MACHINE("none", machine_none_machine_init) > > >>> diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs > > >>> index 739e2b7..3b3e6ea 100644 > > >>> --- a/hw/mips/Makefile.objs > > >>> +++ b/hw/mips/Makefile.objs > > >>> @@ -1,4 +1,4 @@ > > >>> -obj-y +=3D addr.o mips_int.o > > >>> +obj-y +=3D addr.o common.o mips_int.o > > >>> obj-$(CONFIG_R4K) +=3D r4k.o > > >>> obj-$(CONFIG_MALTA) +=3D gt64xxx_pci.o malta.o > > >>> obj-$(CONFIG_MIPSSIM) +=3D mipssim.o > > >>> diff --git a/hw/mips/common.c b/hw/mips/common.c > > >>> new file mode 100644 > > >>> index 0000000..4d8e141 > > >>> --- /dev/null > > >>> +++ b/hw/mips/common.c > > >>> @@ -0,0 +1,42 @@ > > >>> +/* > > >>> + * Common MIPS routines > > >>> + * > > >>> + * Copyright (c) 2020 Huacai Chen (chenhc@lemote.com) > > >>> + * This code is licensed under the GNU GPL v2. > > >>> + */ > > >>> + > > >>> +#include > > >>> +#include "qemu/osdep.h" > > >>> +#include "qemu-common.h" > > >>> +#include "hw/boards.h" > > >>> +#include "hw/mips/mips.h" > > >>> +#include "sysemu/kvm_int.h" > > >>> + > > >>> +#ifndef CONFIG_KVM > > >>> + > > >>> +int mips_kvm_type(MachineState *machine, const char *vm_type) > > >>> +{ > > >>> + return 0; > > >>> +} > > >>> + > > >>> +#else > > >>> + > > >>> +int mips_kvm_type(MachineState *machine, const char *vm_type) > > >>> +{ > > >>> + int r; > > >>> + KVMState *s =3D KVM_STATE(machine->accelerator); > > >>> + > > >>> + r =3D kvm_check_extension(s, KVM_CAP_MIPS_VZ); > > >>> + if (r > 0) { > > >>> + return KVM_VM_MIPS_VZ; > > >>> + } > > >>> + > > >>> + r =3D kvm_check_extension(s, KVM_CAP_MIPS_TE); > > >>> + if (r > 0) { > > >>> + return KVM_VM_MIPS_TE; > > >>> + } > > >>> + > > >>> + return -1; > > >>> +} > > >>> + > > >>> +#endif > > >>> diff --git a/include/hw/mips/mips.h b/include/hw/mips/mips.h > > >>> index 0af4c3d..2ac0580 100644 > > >>> --- a/include/hw/mips/mips.h > > >>> +++ b/include/hw/mips/mips.h > > >>> @@ -20,4 +20,7 @@ void rc4030_dma_write(void *dma, uint8_t *buf, in= t len); > > >>> > > >>> DeviceState *rc4030_init(rc4030_dma **dmas, IOMMUMemoryRegion **dm= a_mr); > > >>> > > >>> +/* common.c */ > > >>> +int mips_kvm_type(MachineState *machine, const char *vm_type); > > >>> + > > >>> #endif > > >>> -- > > >>> 2.7.0 > > >>> > > > > > > >