From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:53480) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8ahS-0007TU-Fh for qemu-devel@nongnu.org; Tue, 27 Sep 2011 12:40:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R8ahR-0004et-9y for qemu-devel@nongnu.org; Tue, 27 Sep 2011 12:40:06 -0400 Received: from mail-qy0-f180.google.com ([209.85.216.180]:50187) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8ahR-0004ej-55 for qemu-devel@nongnu.org; Tue, 27 Sep 2011 12:40:05 -0400 Received: by qyc1 with SMTP id 1so7539360qyc.4 for ; Tue, 27 Sep 2011 09:40:04 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <4E819012.6090100@redhat.com> References: <4E7A828A.3030404@codemonkey.ws> <4E7F366F.9060501@redhat.com> <4E7F5B62.1090307@redhat.com> <4E804F20.2090007@redhat.com> <4E80B3EF.3070202@redhat.com> <4E80B535.1030804@redhat.com> <4E818A5A.6000605@redhat.com> <4E819012.6090100@redhat.com> From: Blue Swirl Date: Tue, 27 Sep 2011 16:39:42 +0000 Message-ID: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [FYI] Soft feature freeze for 1.0 is 10/15 (three weeks away) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: qemu-devel On Tue, Sep 27, 2011 at 8:57 AM, Avi Kivity wrote: > On 09/27/2011 11:33 AM, Avi Kivity wrote: >> >> On 09/26/2011 09:07 PM, Blue Swirl wrote: >>> >>> >> =C2=A0The default address is used for early serial printk in OpenBIO= S, so >>> >> it >>> >> =C2=A0should still work. >>> > >>> > =C2=A0Ok, so drop the extra mapping, but init the dynamic mapping to >>> > 0x80013000. >>> >>> That should work. >> >> It's already there (macio.c): >> >> =C2=A0 =C2=A0if (macio_state->escc_mem) { >> =C2=A0 =C2=A0 =C2=A0 =C2=A0memory_region_add_subregion(bar, 0x13000, mac= io_state->escc_mem); >> =C2=A0 =C2=A0} >> >> I'll drop the extra mapping. >> > > Well, it's not that easy. =C2=A0As the other mapping is part of an ordina= ry BAR, > you need to setup the device (at least PCI_COMMAND and PCI_BASE_ADDRESS_0= ) > so it responds to memory requests, and also enable the bridge. > > We could hack it by having a low-priority mapping at 0x80013000, but it > seems wrong. =C2=A0Maybe the firmware should configure that BAR first? = =C2=A0What > happens on real hardware? In this message I seem to confess that the address is arbitrary and in the subsequent messages the overlap with PCI region is also discussed. http://lists.nongnu.org/archive/html/qemu-devel/2009-01/msg00542.html Maybe the address of macio should be fixed as Laurent suggested.