From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:37236) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0HGK-0005FE-38 for qemu-devel@nongnu.org; Sun, 04 Sep 2011 14:17:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R0HGI-000636-MZ for qemu-devel@nongnu.org; Sun, 04 Sep 2011 14:17:44 -0400 Received: from mail-qw0-f43.google.com ([209.85.216.43]:63290) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0HGI-000630-IL for qemu-devel@nongnu.org; Sun, 04 Sep 2011 14:17:42 -0400 Received: by qwm42 with SMTP id 42so3218685qwm.30 for ; Sun, 04 Sep 2011 11:17:42 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1314909960-31738-7-git-send-email-jcmvbkbc@gmail.com> References: <1314909960-31738-1-git-send-email-jcmvbkbc@gmail.com> <1314909960-31738-7-git-send-email-jcmvbkbc@gmail.com> From: Blue Swirl Date: Sun, 4 Sep 2011 18:17:22 +0000 Message-ID: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v4 06/32] target-xtensa: add sample board List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Max Filippov Cc: qemu-devel@nongnu.org On Thu, Sep 1, 2011 at 8:45 PM, Max Filippov wrote: > Sample board and sample CPU core are used for debug and may be used for > development of custom SoC emulators. > > This board has two fixed size memory regions for DTCM and ITCM and > variable length SRAM region. > > Signed-off-by: Max Filippov > --- > =C2=A0Makefile.target =C2=A0 =C2=A0| =C2=A0 =C2=A01 + > =C2=A0hw/xtensa_sample.c | =C2=A0105 ++++++++++++++++++++++++++++++++++++= ++++++++++++++++ > =C2=A02 files changed, 106 insertions(+), 0 deletions(-) > =C2=A0create mode 100644 hw/xtensa_sample.c > > diff --git a/Makefile.target b/Makefile.target > index b833c10..98455e3 100644 > --- a/Makefile.target > +++ b/Makefile.target > @@ -374,6 +374,7 @@ obj-alpha-y =3D i8259.o mc146818rtc.o > =C2=A0obj-alpha-y +=3D vga.o cirrus_vga.o > > =C2=A0obj-xtensa-y +=3D xtensa_pic.o > +obj-xtensa-y +=3D xtensa_sample.o > > =C2=A0main.o: QEMU_CFLAGS+=3D$(GPROF_CFLAGS) > > diff --git a/hw/xtensa_sample.c b/hw/xtensa_sample.c > new file mode 100644 > index 0000000..9f7733b > --- /dev/null > +++ b/hw/xtensa_sample.c > @@ -0,0 +1,105 @@ > +/* > + * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab. > + * All rights reserved. > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions ar= e met: > + * =C2=A0 =C2=A0 * Redistributions of source code must retain the above = copyright > + * =C2=A0 =C2=A0 =C2=A0 notice, this list of conditions and the followin= g disclaimer. > + * =C2=A0 =C2=A0 * Redistributions in binary form must reproduce the abo= ve copyright > + * =C2=A0 =C2=A0 =C2=A0 notice, this list of conditions and the followin= g disclaimer in the > + * =C2=A0 =C2=A0 =C2=A0 documentation and/or other materials provided wi= th the distribution. > + * =C2=A0 =C2=A0 * Neither the name of the Open Source and Linux Lab nor= the > + * =C2=A0 =C2=A0 =C2=A0 names of its contributors may be used to endorse= or promote products > + * =C2=A0 =C2=A0 =C2=A0 derived from this software without specific prio= r written permission. > + * > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "= AS IS" > + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,= THE > + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PU= RPOSE > + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY > + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA= MAGES > + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE= RVICES; > + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS= ED AND > + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR= TORT > + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE= OF THIS > + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > + */ > + > +#include "sysemu.h" > +#include "boards.h" > +#include "loader.h" > +#include "elf.h" > + > +static void xtensa_sample_reset(void *env) > +{ > + =C2=A0 =C2=A0cpu_reset(env); > +} > + > +static void xtensa_init(ram_addr_t ram_size, > + =C2=A0 =C2=A0 =C2=A0 =C2=A0const char *boot_device, > + =C2=A0 =C2=A0 =C2=A0 =C2=A0const char *kernel_filename, const char *ker= nel_cmdline, > + =C2=A0 =C2=A0 =C2=A0 =C2=A0const char *initrd_filename, const char *cpu= _model) > +{ > + =C2=A0 =C2=A0CPUState *env =3D NULL; > + =C2=A0 =C2=A0ram_addr_t ram_offset; > + =C2=A0 =C2=A0int n; > + > + =C2=A0 =C2=A0for (n =3D 0; n < smp_cpus; n++) { > + =C2=A0 =C2=A0 =C2=A0 =C2=A0env =3D cpu_init(cpu_model); > + =C2=A0 =C2=A0 =C2=A0 =C2=A0if (!env) { > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0fprintf(stderr, "Unable to fin= d CPU definition\n"); > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0exit(1); > + =C2=A0 =C2=A0 =C2=A0 =C2=A0} > + =C2=A0 =C2=A0 =C2=A0 =C2=A0qemu_register_reset(xtensa_sample_reset, env= ); > + =C2=A0 =C2=A0} > + > + =C2=A0 =C2=A0ram_offset =3D qemu_ram_alloc(NULL, "xtensa.dram", 0x10000= ); > + =C2=A0 =C2=A0cpu_register_physical_memory(0x5ffd0000, 0x10000, ram_offs= et); > + > + =C2=A0 =C2=A0ram_offset =3D qemu_ram_alloc(NULL, "xtensa.iram", 0x20000= ); > + =C2=A0 =C2=A0cpu_register_physical_memory(0x5ffe0000, 0x20000, ram_offs= et); > + > + =C2=A0 =C2=A0ram_offset =3D qemu_ram_alloc(NULL, "xtensa.sram", ram_siz= e); > + =C2=A0 =C2=A0cpu_register_physical_memory(0x60000000, ram_size, ram_off= set); These should be converted to the new memory API. Please see pc.c for refere= nce. > + > + =C2=A0 =C2=A0if (kernel_filename) { > + =C2=A0 =C2=A0 =C2=A0 =C2=A0uint64_t elf_entry; > + =C2=A0 =C2=A0 =C2=A0 =C2=A0uint64_t elf_lowaddr; > +#ifdef TARGET_WORDS_BIGENDIAN > + =C2=A0 =C2=A0 =C2=A0 =C2=A0int success =3D load_elf(kernel_filename, NU= LL, NULL, &elf_entry, > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0&elf_lowaddr, NU= LL, 1, ELF_MACHINE, 0); > +#else > + =C2=A0 =C2=A0 =C2=A0 =C2=A0int success =3D load_elf(kernel_filename, NU= LL, NULL, &elf_entry, > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0&elf_lowaddr, NU= LL, 0, ELF_MACHINE, 0); > +#endif > + =C2=A0 =C2=A0 =C2=A0 =C2=A0if (success > 0) { > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0env->pc =3D elf_entry; > + =C2=A0 =C2=A0 =C2=A0 =C2=A0} > + =C2=A0 =C2=A0} > +} > + > +static void xtensa_sample_init(ram_addr_t ram_size, > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 c= onst char *boot_device, > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 c= onst char *kernel_filename, const char *kernel_cmdline, > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 c= onst char *initrd_filename, const char *cpu_model) > +{ > + =C2=A0 =C2=A0if (!cpu_model) { > + =C2=A0 =C2=A0 =C2=A0 =C2=A0cpu_model =3D "sample-xtensa-core"; > + =C2=A0 =C2=A0} > + =C2=A0 =C2=A0xtensa_init(ram_size, boot_device, kernel_filename, kernel= _cmdline, > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0initrd_fi= lename, cpu_model); > +} > + > +static QEMUMachine xtensa_sample_machine =3D { > + =C2=A0 =C2=A0.name =3D "sample-xtensa-machine", > + =C2=A0 =C2=A0.desc =3D "Sample Xtensa machine (sample Xtensa core)", > + =C2=A0 =C2=A0.init =3D xtensa_sample_init, > + =C2=A0 =C2=A0.max_cpus =3D 4, > +}; > + > +static void xtensa_sample_machine_init(void) > +{ > + =C2=A0 =C2=A0qemu_register_machine(&xtensa_sample_machine); > +} > + > +machine_init(xtensa_sample_machine_init); > -- > 1.7.6 > > >