Hi
Rudolf,
You're correct. Simply writing 0xa0 to 0xb2 will cause this.
I'm having a hard time figuring out what 0xb2 is. It seems like an I/O port that causes an SMI and sets APMC_EN=1. That's all that I could find so far. I have no idea yet what the bits in 0xa0 do.
Is this telling the BIOS that I have an APM aware OS (not ACPI)? If that's the case, then I have a feeling that my ACPICA should be instead doing something to say "I'm not APM aware" so that it doesn't try to do this. Or is being "APM aware" required for ACPI functionality since it's the successor to APM? On this system reading battery information works fine without this write to 0xb2. I would have to test on other devices as well to check if that's always the case or not.
As a side note, in case it's relevant, I am setting the following in my ACPICA:
#define ACPI_OS_NAME "Microsoft Windows NT"
That was done arbitrarily or perhaps out of laziness/lack of testing support. The comment above ACPI_OS_NAME suggests that it's obsolete anyways.
Unfortunately, I don't see any option in the BIOS relating to clock gating or C11 power states.
Should I pursue allowing the write but then disable the clock gating separately? I'm not sure how to do that yet.
I started to learn about clock gating. I wanted to see if I could confirm that clock gating happens when 0xa0 is written to 0xb2. I stumbled on the following information from Intel:
-------------------------------------------------
30.2.20 ITSS Power Reduction Control (ITSSPRC)—Offset 3300h
Power controls for the entire interrupt and timer subsystem.
Bit 2:
"8254 Static Clock Gating Enable (CGE8254): When set, the 8254 timer is
disabled statically. This bit shall be set by BIOS if the 8254 feature is not needed in
the system or before BIOS hands off the system that supports C11. Normal operation
of 8254 requires this bit to 0."
-------------------------------------------------
Unfortunately, I haven't been able to get access to that bit yet. The P2SB Bridge is hidden. I've found a way to get the SBREG_BAR from the P2SB Bridge in the QNX BSP. However, using it to read the ITSSPRC still returns 0xFFFFFFFF. I was hoping that I could clear that bit if it is getting set to test if that makes the PC speaker work again.
Part of this is a learning exercise for me, but part of it is also to get a proper fix for this system. If this is just an "APM thing" that shouldn't be enabled to begin with on my system, then I guess I need to figure out how to tell BIOS that this OS is "not APM aware". Either that, or just block 0xa0 writes to 0xb2 (but that feels like the wrong approach).
Thanks,
Devin