From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0EB32C433F5 for ; Wed, 29 Sep 2021 20:17:07 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B80F860F70 for ; Wed, 29 Sep 2021 20:17:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B80F860F70 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=cs.unc.edu Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 45BE26E20F; Wed, 29 Sep 2021 20:17:06 +0000 (UTC) Received: from mail-vs1-xe33.google.com (mail-vs1-xe33.google.com [IPv6:2607:f8b0:4864:20::e33]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3560B6E20F for ; Wed, 29 Sep 2021 20:17:04 +0000 (UTC) Received: by mail-vs1-xe33.google.com with SMTP id f2so3623098vsj.4 for ; Wed, 29 Sep 2021 13:17:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cs.unc.edu; s=google; h=mime-version:from:date:message-id:subject:to; bh=r9lKLckoBFKPmXbYEdNaTsIlUxaL+QbAxvt08BB4Qp0=; b=V27yCkfvpAnW1iwIVXtRHOfW+NMcx/GnE9rMVls9596Z7RDpvKk4k9fwlvCAG1EdWI LbduMrN+hULdweC4/FsTgxTdVCdvf8JJSyXB+xKYKJtunWOmM8LqCP12sUWntVR9LOxS 0W8Ylx5q/jmi+gLOsyRDQKn21lT3KKbrgxzus= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=r9lKLckoBFKPmXbYEdNaTsIlUxaL+QbAxvt08BB4Qp0=; b=4HkHczFqxvFZ/GwRjxSBoCY1nWe+T6Be9CsWNkgaqfwVRlY3Ask8lOVDV0wioRqcy7 8DBCUnBtm5q1Y5Rj/sQF/SOVgMg3/H3Y8hO5ipzs8pq0+4d7DTX3aHwKwgMbpt7C8Hhz NZemaZbFXPI2p7b2iAaqj36GFUEV4GDttZJpYpCfDMz9wGCkFJ1icrYq/Cku0arGvWHN fGm4/X88OmVs9ngCJgNxLn0Z2Qd+R+5OZVAVqedr79uZmaNtK1pzds7YaorOf+UEpSOy Glhbz+aF6ZIfyT9qEV9mt5delTe/dADaw9TrTUqBw1cW2XLPo04GIa08p62N85F9F2b6 OGzw== X-Gm-Message-State: AOAM530Zm3eViAs56quACYWao74jT2ZtdFL0d8eGFlos5047MGwnXZtU rHQIIwuKyYJLhzdbPwbbXi1O4bYVPGFvxMmFSIwBQkWZG614TXZO X-Google-Smtp-Source: ABdhPJzAhNwcKk/QlhCuKU2qfUivYuwOHnvPTe/LrpEYSwWbtYMoskN0AWzQvR+gbRD789DXcNIBLqTXbSQ1b7k5YvA= X-Received: by 2002:a05:6102:3548:: with SMTP id e8mr771555vss.44.1632946622718; Wed, 29 Sep 2021 13:17:02 -0700 (PDT) MIME-Version: 1.0 From: Joshua Bakita Date: Wed, 29 Sep 2021 16:16:52 -0400 Message-ID: To: nouveau@lists.freedesktop.org Content-Type: text/plain; charset="UTF-8" Subject: [Nouveau] Understanding BAR1 Offset to imem/VRAM PA Mapping X-BeenThere: nouveau@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Nouveau development list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: nouveau-bounces@lists.freedesktop.org Sender: "Nouveau" Hello, I'm trying to understand how VRAM PAs are mapped to BAR1 offsets on Fermi+, but I'm having difficulty digging through the abstractions in nouveau. I spent the better part of yesterday digging through the nv50_instobj_*() functions, but I lost track of which page tables are being modified and where they're coming from somewhere around level 7 of indirection/aliasing from the nvkm_kmap() call (aka nv50_instobj_acquire()) to the actual nvkm_vmm_iter() logic which I think does the mapping. If page tables are used to map BAR1 offsets to VRAM PAs on Fermi+, I'd like to understand their relation to the normal GPU VA to PA page tables, and how we tell the hardware which page tables to use for the BAR1 mappings. Best regards, Joshua Bakita PhD Student UNC Chapel Hill | Real-Time Systems Group (Apologies if anyone already received this email, I tried sending it earlier and I think it got stuck in moderation.)