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From: chen huacai <zltjiangshi@gmail.com>
To: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Cc: "Huacai Chen" <chenhuacai@gmail.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Aleksandar Markovic" <aleksandar.qemu.devel@gmail.com>,
	"Huacai Chen" <chenhc@lemote.com>,
	"Aleksandar Rikalo" <aleksandar.rikalo@rt-rk.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>
Subject: Re: [PATCH for-5.1 V3 2/7] hw/mips: Implement the kvm_type() hook in MachineClass
Date: Mon, 1 Jun 2020 08:06:02 -0400	[thread overview]
Message-ID: <CABDp7Vpnn4OSrGnwDWyDa+vZmbPMShbi9un-Tw7_596X0cvfYw@mail.gmail.com> (raw)
In-Reply-To: <CAL1e-=jG0nAce7Un6WYAwA50v+qaOcWvfMEsWWeKY1VE4jUgfw@mail.gmail.com>

On Mon, Jun 1, 2020 at 6:15 AM Aleksandar Markovic
<aleksandar.m.mail@gmail.com> wrote:
>
> On Mon, Jun 1, 2020 at 11:01 AM Aleksandar Markovic
> <aleksandar.m.mail@gmail.com> wrote:
> >
> > On Sun, May 3, 2020 at 12:24 PM Huacai Chen <zltjiangshi@gmail.com> wrote:
> > >
> > > MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we
> > > can't create a VZ guest in QEMU because it lacks the kvm_type() hook in
> > > MachineClass. Besides, libvirt uses a null-machine to detect the kvm
> > > capability, so by default it will return "KVM not supported" on a VZ
> > > platform. Thus, null-machine also need the kvm_type() hook.
> > >
> > > Signed-off-by: Huacai Chen <chenhc@lemote.com>
> > > Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> > > ---
> >
> > Applied to MIPS queue.
> >
>
> Huacai,
>
> There were some problems during integration of this patch that I do
> before any pull request. I will for now omit it from the pull request I
> plan to send today. I leave to you to integrate the patch in some future
> series of yours, the one that will complete KVM support for Loongson 3.
>
> In other words, this patch is "unapplied" to MIPS queue.
>
> Best Regards,
> Aleksandar
>

Hi, Aleksandar,
The V3 of kvm series can't be applied because of recent upstream changes.
I will send V4 to sovle it tomorrow, please queue this series after that.
Thanks.

Regards,
Huacai

> > Best Regards,
> > Aleksandar
> >
> > >  hw/core/Makefile.objs  |  2 +-
> > >  hw/core/null-machine.c |  4 ++++
> > >  hw/mips/Makefile.objs  |  2 +-
> > >  hw/mips/common.c       | 31 +++++++++++++++++++++++++++++++
> > >  include/hw/mips/mips.h |  3 +++
> > >  5 files changed, 40 insertions(+), 2 deletions(-)
> > >  create mode 100644 hw/mips/common.c
> > >
> > > diff --git a/hw/core/Makefile.objs b/hw/core/Makefile.objs
> > > index 1d540ed..b5672f4 100644
> > > --- a/hw/core/Makefile.objs
> > > +++ b/hw/core/Makefile.objs
> > > @@ -17,11 +17,11 @@ common-obj-$(CONFIG_SOFTMMU) += vm-change-state-handler.o
> > >  common-obj-$(CONFIG_SOFTMMU) += qdev-properties-system.o
> > >  common-obj-$(CONFIG_SOFTMMU) += sysbus.o
> > >  common-obj-$(CONFIG_SOFTMMU) += machine.o
> > > -common-obj-$(CONFIG_SOFTMMU) += null-machine.o
> > >  common-obj-$(CONFIG_SOFTMMU) += loader.o
> > >  common-obj-$(CONFIG_SOFTMMU) += machine-hmp-cmds.o
> > >  common-obj-$(CONFIG_SOFTMMU) += numa.o
> > >  common-obj-$(CONFIG_SOFTMMU) += clock-vmstate.o
> > > +obj-$(CONFIG_SOFTMMU) += null-machine.o
> > >  obj-$(CONFIG_SOFTMMU) += machine-qmp-cmds.o
> > >
> > >  common-obj-$(CONFIG_EMPTY_SLOT) += empty_slot.o
> > > diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c
> > > index cb47d9d..94a36f9 100644
> > > --- a/hw/core/null-machine.c
> > > +++ b/hw/core/null-machine.c
> > > @@ -17,6 +17,7 @@
> > >  #include "sysemu/sysemu.h"
> > >  #include "exec/address-spaces.h"
> > >  #include "hw/core/cpu.h"
> > > +#include "hw/mips/mips.h"
> > >
> > >  static void machine_none_init(MachineState *mch)
> > >  {
> > > @@ -50,6 +51,9 @@ static void machine_none_machine_init(MachineClass *mc)
> > >      mc->max_cpus = 1;
> > >      mc->default_ram_size = 0;
> > >      mc->default_ram_id = "ram";
> > > +#ifdef TARGET_MIPS
> > > +    mc->kvm_type = mips_kvm_type;
> > > +#endif
> > >  }
> > >
> > >  DEFINE_MACHINE("none", machine_none_machine_init)
> > > diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs
> > > index 525809a..2f7795b 100644
> > > --- a/hw/mips/Makefile.objs
> > > +++ b/hw/mips/Makefile.objs
> > > @@ -1,4 +1,4 @@
> > > -obj-y += addr.o mips_int.o
> > > +obj-y += addr.o common.o mips_int.o
> > >  obj-$(CONFIG_R4K) += mips_r4k.o
> > >  obj-$(CONFIG_MALTA) += gt64xxx_pci.o mips_malta.o
> > >  obj-$(CONFIG_MIPSSIM) += mips_mipssim.o
> > > diff --git a/hw/mips/common.c b/hw/mips/common.c
> > > new file mode 100644
> > > index 0000000..0e33bd0
> > > --- /dev/null
> > > +++ b/hw/mips/common.c
> > > @@ -0,0 +1,31 @@
> > > +/*
> > > + * Common MIPS routines
> > > + *
> > > + * Copyright (c) 2020 Huacai Chen (chenhc@lemote.com)
> > > + * This code is licensed under the GNU GPL v2.
> > > + */
> > > +
> > > +#include <linux/kvm.h>
> > > +#include "qemu/osdep.h"
> > > +#include "qemu-common.h"
> > > +#include "hw/boards.h"
> > > +#include "hw/mips/mips.h"
> > > +#include "sysemu/kvm_int.h"
> > > +
> > > +int mips_kvm_type(MachineState *machine, const char *vm_type)
> > > +{
> > > +    int r;
> > > +    KVMState *s = KVM_STATE(machine->accelerator);
> > > +
> > > +    r = kvm_check_extension(s, KVM_CAP_MIPS_VZ);
> > > +    if (r > 0) {
> > > +        return KVM_VM_MIPS_VZ;
> > > +    }
> > > +
> > > +    r = kvm_check_extension(s, KVM_CAP_MIPS_TE);
> > > +    if (r > 0) {
> > > +        return KVM_VM_MIPS_TE;
> > > +    }
> > > +
> > > +    return -1;
> > > +}
> > > diff --git a/include/hw/mips/mips.h b/include/hw/mips/mips.h
> > > index 0af4c3d..2ac0580 100644
> > > --- a/include/hw/mips/mips.h
> > > +++ b/include/hw/mips/mips.h
> > > @@ -20,4 +20,7 @@ void rc4030_dma_write(void *dma, uint8_t *buf, int len);
> > >
> > >  DeviceState *rc4030_init(rc4030_dma **dmas, IOMMUMemoryRegion **dma_mr);
> > >
> > > +/* common.c */
> > > +int mips_kvm_type(MachineState *machine, const char *vm_type);
> > > +
> > >  #endif
> > > --
> > > 2.7.0
> > >
> > >



-- 
Huacai Chen


  reply	other threads:[~2020-06-01 12:07 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-03 10:20 [PATCH for-5.1 V3 0/7] mips: Add Loongson-3 machine support (with KVM) Huacai Chen
2020-05-03 10:20 ` [PATCH for-5.1 V3 1/7] configure: Add KVM target support for MIPS64 Huacai Chen
2020-05-12 12:54   ` Aleksandar Markovic
2020-06-01  9:03   ` Aleksandar Markovic
2020-05-03 10:20 ` [PATCH for-5.1 V3 2/7] hw/mips: Implement the kvm_type() hook in MachineClass Huacai Chen
2020-05-14 19:37   ` Aleksandar Markovic
2020-06-01  9:01   ` Aleksandar Markovic
2020-06-01 10:15     ` Aleksandar Markovic
2020-06-01 12:06       ` chen huacai [this message]
2020-05-03 10:20 ` [PATCH for-5.1 V3 3/7] hw/mips: Add CPU IRQ3 delivery for KVM Huacai Chen
2020-05-12 12:57   ` Aleksandar Markovic
2020-05-03 10:20 ` [PATCH for-5.1 V3 4/7] target/mips: Add Loongson-3 CPU definition Huacai Chen
2020-05-03 10:20 ` [PATCH for-5.1 V3 5/7] target/mips: Add more CP0 register for save/restore Huacai Chen
2020-05-12 13:01   ` Aleksandar Markovic
2020-06-01  9:05   ` Aleksandar Markovic
2020-05-03 10:20 ` [PATCH for-5.1 V3 6/7] hw/mips: Add Loongson-3 machine support (with KVM) Huacai Chen
2020-05-03 10:20 ` [PATCH for-5.1 V3 7/7] MAINTAINERS: Add myself as Loongson-3 maintainer Huacai Chen
2020-05-03 10:42 ` [PATCH for-5.1 V3 0/7] mips: Add Loongson-3 machine support (with KVM) 罗勇刚(Yonggang Luo)
2020-05-04  6:13   ` chen huacai
2020-05-04  6:15     ` 罗勇刚(Yonggang Luo)
2020-05-03 10:49 ` no-reply
2020-05-03 10:49 ` Aleksandar Markovic
2020-05-05  7:40   ` chen huacai
2020-05-05 10:12     ` Aleksandar Markovic
2020-05-06  1:50       ` Huacai Chen
2020-05-07 12:17         ` Aleksandar Markovic
2020-05-08  1:41           ` Huacai Chen
2020-05-08 16:55 ` Aleksandar Markovic
2020-05-09  3:07   ` chen huacai

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