From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rodrigo Vivi Subject: Re: [PATCH 36/89] drm/i915/skl: Implement WaDisableDgMirrorFixInHalfSliceChicken5:skl Date: Wed, 17 Sep 2014 14:22:18 -0700 Message-ID: References: <1409830075-11139-1-git-send-email-damien.lespiau@intel.com> <1409830075-11139-37-git-send-email-damien.lespiau@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1655114181==" Return-path: Received: from mail-wg0-f51.google.com (mail-wg0-f51.google.com [74.125.82.51]) by gabe.freedesktop.org (Postfix) with ESMTP id 4019A6E412 for ; Wed, 17 Sep 2014 14:22:19 -0700 (PDT) Received: by mail-wg0-f51.google.com with SMTP id k14so1995992wgh.34 for ; Wed, 17 Sep 2014 14:22:18 -0700 (PDT) In-Reply-To: <1409830075-11139-37-git-send-email-damien.lespiau@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Damien Lespiau Cc: intel-gfx List-Id: intel-gfx@lists.freedesktop.org --===============1655114181== Content-Type: multipart/alternative; boundary=f46d043c802070693905034976ad --f46d043c802070693905034976ad Content-Type: text/plain; charset=UTF-8 Reviewed-by: Rodrigo Vivi On Thu, Sep 4, 2014 at 4:27 AM, Damien Lespiau wrote: > Signed-off-by: Damien Lespiau > --- > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++ > 2 files changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > b/drivers/gpu/drm/i915/i915_reg.h > index 5928a75..c293dab 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -5862,6 +5862,9 @@ enum punit_power_well { > #define GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE (1<<10) > #define GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE (1<<3) > > +#define GEN9_HALF_SLICE_CHICKEN5 0xe188 > +#define GEN9_DG_MIRROR_FIX_ENABLE (1<<5) > + > #define GEN8_ROW_CHICKEN 0xe4f0 > #define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8) > #define STALL_DOP_GATING_DISABLE (1<<5) > diff --git a/drivers/gpu/drm/i915/intel_pm.c > b/drivers/gpu/drm/i915/intel_pm.c > index c38baea..faff54e 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -77,6 +77,14 @@ static void gen9_init_clock_gating(struct drm_device > *dev) > I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | > GEN8_SDEUNIT_CLOCK_GATE_DISABLE); > > + /* > + * WaDisableDgMirrorFixInHalfSliceChicken5:skl > + * This is a pre-production w/a. > + */ > + I915_WRITE(GEN9_HALF_SLICE_CHICKEN5, > + I915_READ(GEN9_HALF_SLICE_CHICKEN5) & > + ~GEN9_DG_MIRROR_FIX_ENABLE); > + > /* Wa4x4STCOptimizationDisable:skl */ > I915_WRITE(CACHE_MODE_1, > _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE)); > -- > 1.8.3.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > -- Rodrigo Vivi Blog: http://blog.vivi.eng.br --f46d043c802070693905034976ad Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

On Thu, Sep 4, 2014 at 4:27 AM, Damien Les= piau <damien.lespiau@intel.com> wrote:
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
=C2=A0drivers/gpu/drm/i915/i915_reg.h | 3 +++
=C2=A0drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
=C2=A02 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_re= g.h
index 5928a75..c293dab 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5862,6 +5862,9 @@ enum punit_power_well {
=C2=A0#define=C2=A0 =C2=A0GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE=C2=A0 (1<&= lt;10)
=C2=A0#define=C2=A0 =C2=A0GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE (1<<3)=

+#define GEN9_HALF_SLICE_CHICKEN5=C2=A0 =C2=A0 =C2=A0 =C2=A00xe188
+#define=C2=A0 =C2=A0GEN9_DG_MIRROR_FIX_ENABLE=C2=A0 =C2=A0 (1<<5) +
=C2=A0#define GEN8_ROW_CHICKEN=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A00xe4f0
=C2=A0#define=C2=A0 =C2=A0PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE=C2=A0 =C2= =A0 =C2=A0 =C2=A0 (1<<8)
=C2=A0#define=C2=A0 =C2=A0STALL_DOP_GATING_DISABLE=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0(1<<5)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_p= m.c
index c38baea..faff54e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -77,6 +77,14 @@ static void gen9_init_clock_gating(struct drm_device *de= v)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6= ) |
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0GEN8_S= DEUNIT_CLOCK_GATE_DISABLE);

+=C2=A0 =C2=A0 =C2=A0 =C2=A0/*
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 * WaDisableDgMirrorFixInHalfSliceChicken5:skl<= br> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 * This is a pre-production w/a.
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0I915_WRITE(GEN9_HALF_SLICE_CHICKEN5,
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 I915_READ(G= EN9_HALF_SLICE_CHICKEN5) &
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 ~GEN9_DG_MI= RROR_FIX_ENABLE);
+
=C2=A0 =C2=A0 =C2=A0 =C2=A0 /* Wa4x4STCOptimizationDisable:skl */
=C2=A0 =C2=A0 =C2=A0 =C2=A0 I915_WRITE(CACHE_MODE_1,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0_MASKE= D_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE));
--
1.8.3.1

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--
Rodrigo Vivi
=C2=A0
--f46d043c802070693905034976ad-- --===============1655114181== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1655114181==--