From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rodrigo Vivi Subject: Re: [PATCH 2/3] drm/i915: add enable_ips module option Date: Fri, 31 May 2013 13:04:33 -0300 Message-ID: References: <1368471610-3829-2-git-send-email-przanoni@gmail.com> <1368734199-4070-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ve0-f169.google.com (mail-ve0-f169.google.com [209.85.128.169]) by gabe.freedesktop.org (Postfix) with ESMTP id AFA9AE6261 for ; Fri, 31 May 2013 09:04:33 -0700 (PDT) Received: by mail-ve0-f169.google.com with SMTP id m1so1295297ves.28 for ; Fri, 31 May 2013 09:04:33 -0700 (PDT) In-Reply-To: <1368734199-4070-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx , Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org Reviewed-by: Rodrigo Vivi On Thu, May 16, 2013 at 4:56 PM, Paulo Zanoni wrote: > From: Paulo Zanoni > > IPS is still enabled by default. Feature requested by the power > management team. > > This should also help testing the feature on some early pre-production > hardware where there were relationship problems between IPS and PSR. > > v2: Rebase on top of the newest IPS implementation. > > Requested-by: Kristen Accardi > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/i915_drv.c | 4 ++++ > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/intel_display.c | 3 ++- > 3 files changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index a1a936f..0289f24 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -128,6 +128,10 @@ module_param_named(disable_power_well, i915_disable_power_well, int, 0600); > MODULE_PARM_DESC(disable_power_well, > "Disable the power well when possible (default: false)"); > > +int i915_enable_ips __read_mostly = 1; > +module_param_named(enable_ips, i915_enable_ips, int, 0600); > +MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)"); > + > static struct drm_driver driver; > extern int intel_agp_enabled; > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 639ec0b..a25669f 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1460,6 +1460,7 @@ extern bool i915_enable_hangcheck __read_mostly; > extern int i915_enable_ppgtt __read_mostly; > extern unsigned int i915_preliminary_hw_support __read_mostly; > extern int i915_disable_power_well __read_mostly; > +extern int i915_enable_ips __read_mostly; > > extern int i915_suspend(struct drm_device *dev, pm_message_t state); > extern int i915_resume(struct drm_device *dev); > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 5b41cf3..afde99e 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -3343,7 +3343,8 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) > /* IPS only exists on ULT machines and is tied to pipe A. */ > static bool hsw_crtc_supports_ips(struct intel_crtc *crtc) > { > - return (IS_ULT(crtc->base.dev) && crtc->pipe == PIPE_A); > + return (i915_enable_ips && IS_ULT(crtc->base.dev) && > + crtc->pipe == PIPE_A); > } > > static void hsw_enable_ips(struct intel_crtc *crtc) > -- > 1.8.1.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Rodrigo Vivi Blog: http://blog.vivi.eng.br