From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rodrigo Vivi Subject: Re: [PATCH 21/89] drm/i915/skl: Implement the get_aux_clock_divider() DP vfunc Date: Tue, 16 Sep 2014 18:12:04 -0700 Message-ID: References: <1409830075-11139-1-git-send-email-damien.lespiau@intel.com> <1409830075-11139-22-git-send-email-damien.lespiau@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1242210785==" Return-path: Received: from mail-we0-f182.google.com (mail-we0-f182.google.com [74.125.82.182]) by gabe.freedesktop.org (Postfix) with ESMTP id C8FC08999C for ; Tue, 16 Sep 2014 18:12:05 -0700 (PDT) Received: by mail-we0-f182.google.com with SMTP id k48so645305wev.13 for ; Tue, 16 Sep 2014 18:12:05 -0700 (PDT) In-Reply-To: <1409830075-11139-22-git-send-email-damien.lespiau@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Damien Lespiau Cc: intel-gfx List-Id: intel-gfx@lists.freedesktop.org --===============1242210785== Content-Type: multipart/alternative; boundary=f46d043c7f045aa6230503388ee3 --f46d043c7f045aa6230503388ee3 Content-Type: text/plain; charset=UTF-8 I believe this patch should remove the gen9 part of ilk_get_aux_clock_divider. Also there it just returns 0, but here it returns 0 or 1 depending on the index. This also is incoherent with the commit description. On Thu, Sep 4, 2014 at 4:26 AM, Damien Lespiau wrote: > We need to provide a vfunc that will make the code in intel_dp_aux_ch() > loop once to start the AUX transaction. The return value (clock divider) > is unused on SKL, so just return 1. > > Signed-off-by: Damien Lespiau > --- > drivers/gpu/drm/i915/intel_dp.c | 14 +++++++++++++- > 1 file changed, 13 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c > b/drivers/gpu/drm/i915/intel_dp.c > index a95fb47..4560ced 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -489,6 +489,16 @@ static uint32_t vlv_get_aux_clock_divider(struct > intel_dp *intel_dp, int index) > return index ? 0 : 100; > } > > +static uint32_t skl_get_aux_clock_divider(struct intel_dp *intel_dp, int > index) > +{ > + /* > + * SKL doesn't need us to program the AUX clock divider (Hardware > will > + * derive the clock from CDCLK automatically). We still implement > the > + * get_aux_clock_divider vfunc to plug-in into the existing code. > + */ > + return index ? 0 : 1; > +} > + > static uint32_t i9xx_get_aux_send_ctl(struct intel_dp *intel_dp, > bool has_aux_irq, > int send_bytes, > @@ -4726,7 +4736,9 @@ intel_dp_init_connector(struct intel_digital_port > *intel_dig_port, > int type; > > /* intel_dp vfuncs */ > - if (IS_VALLEYVIEW(dev)) > + if (INTEL_INFO(dev)->gen >= 9) > + intel_dp->get_aux_clock_divider = > skl_get_aux_clock_divider; > + else if (IS_VALLEYVIEW(dev)) > intel_dp->get_aux_clock_divider = > vlv_get_aux_clock_divider; > else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) > intel_dp->get_aux_clock_divider = > hsw_get_aux_clock_divider; > -- > 1.8.3.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > -- Rodrigo Vivi Blog: http://blog.vivi.eng.br --f46d043c7f045aa6230503388ee3 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable
I believe this patch should remove the gen9 part of ilk_ge= t_aux_clock_divider.

Also there it just returns 0, but h= ere it returns 0 or 1 depending on the index.
This also is incohe= rent with the commit description.
On Thu, Sep 4, 2014 at 4:26 AM, Damien Lespiau = <damien.lespiau@intel.com> wrote:
We need to provide a vfunc that will make the code in intel_= dp_aux_ch()
loop once to start the AUX transaction. The return value (clock divider) is unused on SKL, so just return 1.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
=C2=A0drivers/gpu/drm/i915/intel_dp.c | 14 +++++++++++++-
=C2=A01 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_d= p.c
index a95fb47..4560ced 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -489,6 +489,16 @@ static uint32_t vlv_get_aux_clock_divider(struct intel= _dp *intel_dp, int index)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 return index ? 0 : 100;
=C2=A0}

+static uint32_t skl_get_aux_clock_divider(struct intel_dp *intel_dp, int i= ndex)
+{
+=C2=A0 =C2=A0 =C2=A0 =C2=A0/*
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 * SKL doesn't need us to program the AUX c= lock divider (Hardware will
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 * derive the clock from CDCLK automatically). = We still implement the
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 * get_aux_clock_divider vfunc to plug-in into = the existing code.
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0return index ? 0 : 1;
+}
+
=C2=A0static uint32_t i9xx_get_aux_send_ctl(struct intel_dp *intel_dp,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 bool has_aux_ir= q,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 int send_bytes,=
@@ -4726,7 +4736,9 @@ intel_dp_init_connector(struct intel_digital_port *in= tel_dig_port,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 int type;

=C2=A0 =C2=A0 =C2=A0 =C2=A0 /* intel_dp vfuncs */
-=C2=A0 =C2=A0 =C2=A0 =C2=A0if (IS_VALLEYVIEW(dev))
+=C2=A0 =C2=A0 =C2=A0 =C2=A0if (INTEL_INFO(dev)->gen >=3D 9)
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0intel_dp->get_au= x_clock_divider =3D skl_get_aux_clock_divider;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0else if (IS_VALLEYVIEW(dev))
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 intel_dp->get_au= x_clock_divider =3D vlv_get_aux_clock_divider;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 else if (IS_HASWELL(dev) || IS_BROADWELL(dev))<= br> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 intel_dp->get_au= x_clock_divider =3D hsw_get_aux_clock_divider;
--
1.8.3.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesk= top.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx



--
Rodrigo Vivi
=C2=A0
--f46d043c7f045aa6230503388ee3-- --===============1242210785== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1242210785==--