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From: David Kiarie <davidkiarie4@gmail.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
	Jan Kiszka <jan.kiszka@web.de>,
	rkrcmar@redhat.com, Peter Xu <peterx@redhat.com>,
	Eduardo Habkost <ehabkost@redhat.com>
Subject: Re: [Qemu-devel] [V17 3/4] hw/i386: Introduce AMD IOMMU
Date: Sat, 17 Sep 2016 09:09:43 +0300	[thread overview]
Message-ID: <CABdVeACQGHnsQxeBoW2v4ZtL0xZSog_NkoGeyDM+0tQ5=xNV5A@mail.gmail.com> (raw)
In-Reply-To: <57DCCDAD.10105@gmail.com>

On Sat, Sep 17, 2016 at 7:59 AM, David Kiarie <davidkiarie4@gmail.com>
wrote:

>
>
> On 16/09/16 21:58, Michael S. Tsirkin wrote:
>
>> On Wed, Aug 31, 2016 at 07:17:42PM +0300, David Kiarie wrote:
>>
> Hi Michael,
>
> +
>> +/* issue a PCIe completion packet for devid */
>> +typedef struct QEMU_PACKED {
>> +    uint32_t reserved_1:16;
>> +    uint32_t devid:16;
>> +
>> +#ifdef HOST_WORDS_BIGENDIAN
>> +    uint32_t type:4;              /* command type       */
>> +    uint32_t reserved_2:8;
>> +    uint32_t pasid_19_0:20
>> +#else
>> +    uint32_t pasid_19_0:20;
>> +    uint32_t reserved_2:8;
>> +    uint32_t type:4;
>> +#endif /* __BIG_ENDIAN_BITFIELD */
>> +
>> +#ifdef HOST_WORDS_BIGENDIAN
>> +    uint32_t reserved_3:29;
>> +    uint32_t guest:1;
>> +    uint32_t reserved_4:2;
>> +#else
>> +    uint32_t reserved_3:2;
>> +    uint32_t guest:1;
>> +    uint32_t reserved_4:29;
>> +#endif /* __BIG_ENDIAN_BITFIELD */
>> +
>> +    uint32_t completion_tag:16;  /* PCIe PRI information */
>> +    uint32_t reserved_5:16;
>> +} CMDCompletePPR;
>> So as Peter points, out, we don't do this kind of
>> thing. Pls drop this ifdefery and rework using
>> masks and cpu_to_le. E.g.
>>
>>      > +#ifdef HOST_WORDS_BIGENDIAN
>>      > +    uint32_t reserved_3:29;
>>      > +    uint32_t guest:1;
>>      > +    uint32_t reserved_4:2;
>>      > +#else
>>      > +    uint32_t reserved_3:2;
>>      > +    uint32_t guest:1;
>>      > +    uint32_t reserved_4:29;
>>      > +#endif /* __BIG_ENDIAN_BITFIELD */
>>
>>      guest = 1;
>>
>> ->
>>
>> #define GUEST cpu_to_le32(0x1 << 2)
>> uint32_t guest;
>>
>> guest = GUEST;
>>
>
> This might not solve the problem we are encountering here. I don't intent
> to write any values to these fields. I only intend to read.
>
> I read into these structs using 'dma_memory_read' which gives me a memory
> order dependent on the host. Byte swapping the read buffer will lead into
> some of the fields being permanently corrupted since they span across byte
> boundaries. I actually didn't have any bitfields(and was not taking care of
> BE) but then there were some complains that the code was barely readable
> hence the bitfields and later the ifdefinery but I've never checked that
> the BE code complies.


'extract64' seems to solve everything though so I can get rid of all the
host dependent defines: didn't know we had this before.


>

  reply	other threads:[~2016-09-17  6:09 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-31 16:17 [Qemu-devel] [V17 0/4] AMD IOMMU David Kiarie
2016-08-31 16:17 ` [Qemu-devel] [V17 1/4] hw/pci: Prepare for " David Kiarie
2016-08-31 16:17 ` [Qemu-devel] [V17 2/4] hw/i386/trace-events: Add AMD IOMMU trace events David Kiarie
2016-08-31 16:17 ` [Qemu-devel] [V17 3/4] hw/i386: Introduce AMD IOMMU David Kiarie
2016-09-16 18:58   ` Michael S. Tsirkin
2016-09-17  4:59     ` David Kiarie
2016-09-17  6:09       ` David Kiarie [this message]
2016-09-09 18:20 ` [Qemu-devel] [V17 0/4] " Michael S. Tsirkin
2016-09-11 21:16   ` Jan Kiszka
2016-09-16 18:59 ` Michael S. Tsirkin

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