On Mar 27, 2015 3:46 PM, "David Miller" wrote: > > From: Yinghai Lu > Date: Fri, 27 Mar 2015 14:01:54 -0700 > > > On Thu, Mar 26, 2015 at 4:27 PM, David Ahern wrote: > >> On 3/26/15 2:43 PM, Yinghai Lu wrote: > >>> > >>> Can you send out boot log with "debug ignore_loglevel"? > >> > >> > >> attached > > > > So the kernel config is sparc32 or sparc64 ? > > > > pci 0000:06:00.0: reg 0x184: can't handle BAR above 4GB (bus address > > 0x110204000) > > > > > > only could happen when dma_addr_t is 32bit. > > All DMA occurs behind an IOMMU and these IOMMUs only > support 32-bit addressing, therefore dma_addr_t is > 32-bit on sparc64. > > If you want to represent PCI address in some way, you > absolutely cannot use dma_addr_t as your data type. I'm on vacation until April 2, so I can't deal with this until then. Help me understand the sparc64 situation: are you saying that BAR addresses, i.e., MMIO transactions from a CPU or a peer-to-peer DMA can be 64 bits, but a DMA to main memory can only be 32 bits? I assume this would work if we made dma_addr_t 64 bits on sparc64. What would be the cost of doing that? I assume Yinghai is adding a new typedef just for those MMIO addresses. That would be another solution, but it does add significant complexity. Bjorn