From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44951) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YH84e-0003ia-TF for qemu-devel@nongnu.org; Fri, 30 Jan 2015 04:41:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YH84d-0004TV-Tr for qemu-devel@nongnu.org; Fri, 30 Jan 2015 04:41:12 -0500 Received: from mail-oi0-x232.google.com ([2607:f8b0:4003:c06::232]:38616) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YH84d-0004TN-He for qemu-devel@nongnu.org; Fri, 30 Jan 2015 04:41:11 -0500 Received: by mail-oi0-f50.google.com with SMTP id h136so33912083oig.9 for ; Fri, 30 Jan 2015 01:41:10 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <1422559909-19377-1-git-send-email-peter.maydell@linaro.org> References: <1422559909-19377-1-git-send-email-peter.maydell@linaro.org> Date: Fri, 30 Jan 2015 10:41:10 +0100 Message-ID: From: Laurent Desnogues Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH] target-arm: Squash input denormals in FRECPS and FRSQRTS List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Xiangyu Hu , =?UTF-8?B?QWxleCBCZW5uw6ll?= , "qemu-devel@nongnu.org" , Patch Tracking On Thu, Jan 29, 2015 at 8:31 PM, Peter Maydell wrote: > The helper functions for FRECPS and FRSQRTS have special case > handling that includes checks for zero inputs, so squash input > denormals if necessary before those checks. This fixes incorrect > output when the FPCR DZ bit is set to enable squashing of input > denormals. > > Signed-off-by: Peter Maydell Tested-by: Laurent Desnogues Thanks, Laurent > --- > A quick eyeball of helper-a64.c suggests that these are the only > other insns we needed to fix, and a risu test of these insns > confirms that (a) they're buggy and (b) this patch fixes them. > I haven't done an exhaustive coverage test of the whole instruction > set with the DZ bit set, though... > > target-arm/helper-a64.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c > index ebd9247..8aa40e9 100644 > --- a/target-arm/helper-a64.c > +++ b/target-arm/helper-a64.c > @@ -229,6 +229,9 @@ float32 HELPER(recpsf_f32)(float32 a, float32 b, void *fpstp) > { > float_status *fpst = fpstp; > > + a = float32_squash_input_denormal(a, fpst); > + b = float32_squash_input_denormal(b, fpst); > + > a = float32_chs(a); > if ((float32_is_infinity(a) && float32_is_zero(b)) || > (float32_is_infinity(b) && float32_is_zero(a))) { > @@ -241,6 +244,9 @@ float64 HELPER(recpsf_f64)(float64 a, float64 b, void *fpstp) > { > float_status *fpst = fpstp; > > + a = float64_squash_input_denormal(a, fpst); > + b = float64_squash_input_denormal(b, fpst); > + > a = float64_chs(a); > if ((float64_is_infinity(a) && float64_is_zero(b)) || > (float64_is_infinity(b) && float64_is_zero(a))) { > @@ -253,6 +259,9 @@ float32 HELPER(rsqrtsf_f32)(float32 a, float32 b, void *fpstp) > { > float_status *fpst = fpstp; > > + a = float32_squash_input_denormal(a, fpst); > + b = float32_squash_input_denormal(b, fpst); > + > a = float32_chs(a); > if ((float32_is_infinity(a) && float32_is_zero(b)) || > (float32_is_infinity(b) && float32_is_zero(a))) { > @@ -265,6 +274,9 @@ float64 HELPER(rsqrtsf_f64)(float64 a, float64 b, void *fpstp) > { > float_status *fpst = fpstp; > > + a = float64_squash_input_denormal(a, fpst); > + b = float64_squash_input_denormal(b, fpst); > + > a = float64_chs(a); > if ((float64_is_infinity(a) && float64_is_zero(b)) || > (float64_is_infinity(b) && float64_is_zero(a))) { > -- > 1.9.1 > >