Hi Harry

I've done some experim= ents with the USB virtual NIC on the AST2500 and found that to work rather = nicely.

We're currently investigating in my te= am to use that interface as the primary method for transferring data betwee= n the host and the BMC. From what I can tell, this seems to be the=C2=A0fas= test, most secure method. The advantage also is that it doesn't need an= y low-level HW / memory access on the host. However, the host still needs t= o have the USB NIC on its side supported (driver) and configured (IP addres= s). For our environment (Linux), this is easy to achieve.

It should be possible to update the phosphor-ipmi-flash BMC and hos= t side implementation to use a USB NIC for data transfer. However, we haven= 't investigated those details yet.

Other metho= ds for data transfer (LPC, PCIe, eSPI, SuperI/O) all seem to open up a larg= e security hole in the AST2500.

Oskar.

<= /div>

On Wed, Sep 11, 2019 at 10:45 AM Patrick Venture <venture@google.com> wrote:

On Wed, Sep 11, 2019 at 1:59 AM Harr= y Sung1 <hsung1@l= enovo.com> wrote:
>
>
> > On Mon, Sep 9, 2019 at 7:01 AM Oskar Senft <osk@google.com> wrote:
> > >
> > > Hi Harry
> > >
> > > What's the behavior on eSPI? I assume you still have the= aspeed-lpc-ctrl
> > enabled, right?
> > >
> > > Thanks
> > > Oskar.
>
> Hi Oskar,
> Yes, I still enabled the aspeed-lpc-ctrl in my build. Because phosphor= -ipmi-flash has some mandatory actions on /dev/aspeed-lpc-ctrl before flash= (settings for HICR5, HICR7 and HICR8) even though these settings are meani= ngless for eSPI.
>
> Currently, I set ESPI084 (source address) and ESPI088 (target address)= registers manually because linux seems not have a driver can help us to se= t ESPI084 and ESPI088.
>
> Due to the limitation of AST2500, we can only write 256 bytes in one w= rite operation (write shared memory).
> Based on the test result, it takes about 30 mins to transfer a 32MB im= age over eSPI.

:( wow, that's unfortunately rather slow.

>
> Thanks,
> Harry
> > >
> > > On Mon, Sep 9, 2019 at 4:41 AM Harry Sung1 <hsung1@lenovo.com> wrote:<= br> > > >>
> > >> Hi Patrick,
> > >>
> > >>
> > >>
> > >> I found =E2=80=9Cphosphor-ipmi-flash=E2=80=9D have not s= upport flash over eSPI yet.
> > >>
> > >> May I ask if you have any plans to support flash over eS= PI?
> > >>
> > >>
> > >>
> > >> I have done a simple test about shared memory between ho= st and BMC :
> > >>
> > >> The shared memory is work after I set ESPI084 (source ad= dress) and ESPI088
> > (target address) registers.
> > >>
> > >> But it has an limitation that only 256 bytes are availab= le on each page (4KB).
> > >>
> > >>
> > >> For example, if host address starts to write from 0xFE0B= 0000 (BMC
> > >> reserved enough memory already)
> > >>
> > >> Writable area are:
> > >>
> > >> 0xFE0B0000 ~ 0xFE0B00FF
> > >>
> > >> 0xFE0B1000 ~ 0xFE0B10FF
> > >>
> > >> 0xFE0B2000 ~ 0xFE0B20FF
> > >>
> > >> 0xFE0B3000 ~ 0xFE0B30FF
> > >>
> > >> =E2=80=A6
> > >>
> > >> =E2=80=A6
> > >>
> > >> =E2=80=A6
> > >>
> > >>
> > >>
> > >>
> > >>
> > >> Thanks,
> > >> Harry
> >
> > Harry, currently there's no plan to implement it as I have no= method of testing
> > it,=C2=A0 However, it should prove fairly straightforward to add = another option to
> > the transport mechanism list.=C2=A0 Please let me know if you run= into any
> > blockers.
>
> Hi Patrick,
> Got it. The better way to set eSPI register is setting them by the dri= ver, right?
> For quick validation, I am going to use the " ipmilpc" inter= face and set necessary eSPI registers manually.

I don't know as much about the eSPI variation of this.=C2=A0 ipmilpc us= es
whatever LPC memory shared option is available (in coordination with
the host+bmc).=C2=A0 If eSPI doesn't use the aspeed-lpc-ctrl driver for=
what it needs, then perhaps a new option should be added ipmiespi?

>
> Thanks,
> Harry

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