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* [PATCH v3] hvf: guard xgetbv call.
@ 2021-01-13  6:07 Hill Ma
  2021-01-18 23:34 ` Hill Ma
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Hill Ma @ 2021-01-13  6:07 UTC (permalink / raw)
  To: r.bolshakov, richard.henderson, dirty; +Cc: qemu-devel

This prevents illegal instruction on cpus do not support xgetbv.

Buglink: https://bugs.launchpad.net/qemu/+bug/1758819
Signed-off-by: Hill Ma <maahiuzeon@gmail.com>
---
v3: addressed feedback.
v2: xgetbv() modified based on feedback.

 target/i386/hvf/x86_cpuid.c | 34 ++++++++++++++++++++++------------
 1 file changed, 22 insertions(+), 12 deletions(-)

diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c
index a6842912f5..32b0d131df 100644
--- a/target/i386/hvf/x86_cpuid.c
+++ b/target/i386/hvf/x86_cpuid.c
@@ -27,15 +27,22 @@
 #include "vmx.h"
 #include "sysemu/hvf.h"
 
-static uint64_t xgetbv(uint32_t xcr)
+static bool xgetbv(uint32_t cpuid_ecx, uint32_t idx, uint64_t *xcr)
 {
-    uint32_t eax, edx;
+    uint32_t xcrl, xcrh;
 
-    __asm__ volatile ("xgetbv"
-                      : "=a" (eax), "=d" (edx)
-                      : "c" (xcr));
+    if (cpuid_ecx & CPUID_EXT_OSXSAVE) {
+        /*
+         * The xgetbv instruction is not available to older versions of
+         * the assembler, so we encode the instruction manually.
+         */
+        asm(".byte 0x0f, 0x01, 0xd0" : "=a" (xcrl), "=d" (xcrh) : "c" (idx));
 
-    return (((uint64_t)edx) << 32) | eax;
+        *xcr = (((uint64_t)xcrh) << 32) | xcrl;
+        return true;
+    }
+
+    return false;
 }
 
 uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx,
@@ -100,12 +107,15 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx,
         break;
     case 0xD:
         if (idx == 0) {
-            uint64_t host_xcr0 = xgetbv(0);
-            uint64_t supp_xcr0 = host_xcr0 & (XSTATE_FP_MASK | XSTATE_SSE_MASK |
-                                  XSTATE_YMM_MASK | XSTATE_BNDREGS_MASK |
-                                  XSTATE_BNDCSR_MASK | XSTATE_OPMASK_MASK |
-                                  XSTATE_ZMM_Hi256_MASK | XSTATE_Hi16_ZMM_MASK);
-            eax &= supp_xcr0;
+            uint64_t host_xcr0;
+            if (xgetbv(ecx, 0, &host_xcr0)) {
+                uint64_t supp_xcr0 = host_xcr0 & (XSTATE_FP_MASK |
+                                  XSTATE_SSE_MASK | XSTATE_YMM_MASK |
+                                  XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK |
+                                  XSTATE_OPMASK_MASK | XSTATE_ZMM_Hi256_MASK |
+                                  XSTATE_Hi16_ZMM_MASK);
+                eax &= supp_xcr0;
+            }
         } else if (idx == 1) {
             hv_vmx_read_capability(HV_VMX_CAP_PROCBASED2, &cap);
             eax &= CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XGETBV1;
-- 
2.20.1 (Apple Git-117)



^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH v3] hvf: guard xgetbv call.
  2021-01-13  6:07 [PATCH v3] hvf: guard xgetbv call Hill Ma
@ 2021-01-18 23:34 ` Hill Ma
  2021-01-19 12:23 ` Roman Bolshakov
  2021-01-20  3:04 ` Cameron Esfahani
  2 siblings, 0 replies; 4+ messages in thread
From: Hill Ma @ 2021-01-18 23:34 UTC (permalink / raw)
  To: Roman Bolshakov, richard.henderson, dirty; +Cc: qemu-devel

gentle bump :)

On Tue, Jan 12, 2021 at 10:07 PM Hill Ma <maahiuzeon@gmail.com> wrote:
>
> This prevents illegal instruction on cpus do not support xgetbv.
>
> Buglink: https://bugs.launchpad.net/qemu/+bug/1758819
> Signed-off-by: Hill Ma <maahiuzeon@gmail.com>
> ---
> v3: addressed feedback.
> v2: xgetbv() modified based on feedback.
>
>  target/i386/hvf/x86_cpuid.c | 34 ++++++++++++++++++++++------------
>  1 file changed, 22 insertions(+), 12 deletions(-)
>
> diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c
> index a6842912f5..32b0d131df 100644
> --- a/target/i386/hvf/x86_cpuid.c
> +++ b/target/i386/hvf/x86_cpuid.c
> @@ -27,15 +27,22 @@
>  #include "vmx.h"
>  #include "sysemu/hvf.h"
>
> -static uint64_t xgetbv(uint32_t xcr)
> +static bool xgetbv(uint32_t cpuid_ecx, uint32_t idx, uint64_t *xcr)
>  {
> -    uint32_t eax, edx;
> +    uint32_t xcrl, xcrh;
>
> -    __asm__ volatile ("xgetbv"
> -                      : "=a" (eax), "=d" (edx)
> -                      : "c" (xcr));
> +    if (cpuid_ecx & CPUID_EXT_OSXSAVE) {
> +        /*
> +         * The xgetbv instruction is not available to older versions of
> +         * the assembler, so we encode the instruction manually.
> +         */
> +        asm(".byte 0x0f, 0x01, 0xd0" : "=a" (xcrl), "=d" (xcrh) : "c" (idx));
>
> -    return (((uint64_t)edx) << 32) | eax;
> +        *xcr = (((uint64_t)xcrh) << 32) | xcrl;
> +        return true;
> +    }
> +
> +    return false;
>  }
>
>  uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx,
> @@ -100,12 +107,15 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx,
>          break;
>      case 0xD:
>          if (idx == 0) {
> -            uint64_t host_xcr0 = xgetbv(0);
> -            uint64_t supp_xcr0 = host_xcr0 & (XSTATE_FP_MASK | XSTATE_SSE_MASK |
> -                                  XSTATE_YMM_MASK | XSTATE_BNDREGS_MASK |
> -                                  XSTATE_BNDCSR_MASK | XSTATE_OPMASK_MASK |
> -                                  XSTATE_ZMM_Hi256_MASK | XSTATE_Hi16_ZMM_MASK);
> -            eax &= supp_xcr0;
> +            uint64_t host_xcr0;
> +            if (xgetbv(ecx, 0, &host_xcr0)) {
> +                uint64_t supp_xcr0 = host_xcr0 & (XSTATE_FP_MASK |
> +                                  XSTATE_SSE_MASK | XSTATE_YMM_MASK |
> +                                  XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK |
> +                                  XSTATE_OPMASK_MASK | XSTATE_ZMM_Hi256_MASK |
> +                                  XSTATE_Hi16_ZMM_MASK);
> +                eax &= supp_xcr0;
> +            }
>          } else if (idx == 1) {
>              hv_vmx_read_capability(HV_VMX_CAP_PROCBASED2, &cap);
>              eax &= CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XGETBV1;
> --
> 2.20.1 (Apple Git-117)
>


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v3] hvf: guard xgetbv call.
  2021-01-13  6:07 [PATCH v3] hvf: guard xgetbv call Hill Ma
  2021-01-18 23:34 ` Hill Ma
@ 2021-01-19 12:23 ` Roman Bolshakov
  2021-01-20  3:04 ` Cameron Esfahani
  2 siblings, 0 replies; 4+ messages in thread
From: Roman Bolshakov @ 2021-01-19 12:23 UTC (permalink / raw)
  To: Hill Ma; +Cc: richard.henderson, qemu-devel, dirty

On Tue, Jan 12, 2021 at 10:07:35PM -0800, Hill Ma wrote:
> This prevents illegal instruction on cpus do not support xgetbv.
> 
> Buglink: https://bugs.launchpad.net/qemu/+bug/1758819
> Signed-off-by: Hill Ma <maahiuzeon@gmail.com>
> ---
> v3: addressed feedback.
> v2: xgetbv() modified based on feedback.
> 
>  target/i386/hvf/x86_cpuid.c | 34 ++++++++++++++++++++++------------
>  1 file changed, 22 insertions(+), 12 deletions(-)
> 

Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com>
Tested-by: Roman Bolshakov <r.bolshakov@yadro.com>

Thanks,
Roman

> diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c
> index a6842912f5..32b0d131df 100644
> --- a/target/i386/hvf/x86_cpuid.c
> +++ b/target/i386/hvf/x86_cpuid.c
> @@ -27,15 +27,22 @@
>  #include "vmx.h"
>  #include "sysemu/hvf.h"
>  
> -static uint64_t xgetbv(uint32_t xcr)
> +static bool xgetbv(uint32_t cpuid_ecx, uint32_t idx, uint64_t *xcr)
>  {
> -    uint32_t eax, edx;
> +    uint32_t xcrl, xcrh;
>  
> -    __asm__ volatile ("xgetbv"
> -                      : "=a" (eax), "=d" (edx)
> -                      : "c" (xcr));
> +    if (cpuid_ecx & CPUID_EXT_OSXSAVE) {
> +        /*
> +         * The xgetbv instruction is not available to older versions of
> +         * the assembler, so we encode the instruction manually.
> +         */
> +        asm(".byte 0x0f, 0x01, 0xd0" : "=a" (xcrl), "=d" (xcrh) : "c" (idx));
>  
> -    return (((uint64_t)edx) << 32) | eax;
> +        *xcr = (((uint64_t)xcrh) << 32) | xcrl;
> +        return true;
> +    }
> +
> +    return false;
>  }
>  
>  uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx,
> @@ -100,12 +107,15 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx,
>          break;
>      case 0xD:
>          if (idx == 0) {
> -            uint64_t host_xcr0 = xgetbv(0);
> -            uint64_t supp_xcr0 = host_xcr0 & (XSTATE_FP_MASK | XSTATE_SSE_MASK |
> -                                  XSTATE_YMM_MASK | XSTATE_BNDREGS_MASK |
> -                                  XSTATE_BNDCSR_MASK | XSTATE_OPMASK_MASK |
> -                                  XSTATE_ZMM_Hi256_MASK | XSTATE_Hi16_ZMM_MASK);
> -            eax &= supp_xcr0;
> +            uint64_t host_xcr0;
> +            if (xgetbv(ecx, 0, &host_xcr0)) {
> +                uint64_t supp_xcr0 = host_xcr0 & (XSTATE_FP_MASK |
> +                                  XSTATE_SSE_MASK | XSTATE_YMM_MASK |
> +                                  XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK |
> +                                  XSTATE_OPMASK_MASK | XSTATE_ZMM_Hi256_MASK |
> +                                  XSTATE_Hi16_ZMM_MASK);
> +                eax &= supp_xcr0;
> +            }
>          } else if (idx == 1) {
>              hv_vmx_read_capability(HV_VMX_CAP_PROCBASED2, &cap);
>              eax &= CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XGETBV1;
> -- 
> 2.20.1 (Apple Git-117)
> 


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v3] hvf: guard xgetbv call.
  2021-01-13  6:07 [PATCH v3] hvf: guard xgetbv call Hill Ma
  2021-01-18 23:34 ` Hill Ma
  2021-01-19 12:23 ` Roman Bolshakov
@ 2021-01-20  3:04 ` Cameron Esfahani
  2 siblings, 0 replies; 4+ messages in thread
From: Cameron Esfahani @ 2021-01-20  3:04 UTC (permalink / raw)
  To: Hill Ma; +Cc: r.bolshakov, richard.henderson, qemu-devel

[-- Attachment #1: Type: text/plain, Size: 2960 bytes --]

Reviewed-by: Cameron Esfahani <dirty@apple.com <mailto:dirty@apple.com>>

Cameron Esfahani
dirty@apple.com

> On Jan 12, 2021, at 10:07 PM, Hill Ma <maahiuzeon@gmail.com> wrote:
> 
> This prevents illegal instruction on cpus do not support xgetbv.
> 
> Buglink: https://bugs.launchpad.net/qemu/+bug/1758819
> Signed-off-by: Hill Ma <maahiuzeon@gmail.com>
> ---
> v3: addressed feedback.
> v2: xgetbv() modified based on feedback.
> 
> target/i386/hvf/x86_cpuid.c | 34 ++++++++++++++++++++++------------
> 1 file changed, 22 insertions(+), 12 deletions(-)
> 
> diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c
> index a6842912f5..32b0d131df 100644
> --- a/target/i386/hvf/x86_cpuid.c
> +++ b/target/i386/hvf/x86_cpuid.c
> @@ -27,15 +27,22 @@
> #include "vmx.h"
> #include "sysemu/hvf.h"
> 
> -static uint64_t xgetbv(uint32_t xcr)
> +static bool xgetbv(uint32_t cpuid_ecx, uint32_t idx, uint64_t *xcr)
> {
> -    uint32_t eax, edx;
> +    uint32_t xcrl, xcrh;
> 
> -    __asm__ volatile ("xgetbv"
> -                      : "=a" (eax), "=d" (edx)
> -                      : "c" (xcr));
> +    if (cpuid_ecx & CPUID_EXT_OSXSAVE) {
> +        /*
> +         * The xgetbv instruction is not available to older versions of
> +         * the assembler, so we encode the instruction manually.
> +         */
> +        asm(".byte 0x0f, 0x01, 0xd0" : "=a" (xcrl), "=d" (xcrh) : "c" (idx));
> 
> -    return (((uint64_t)edx) << 32) | eax;
> +        *xcr = (((uint64_t)xcrh) << 32) | xcrl;
> +        return true;
> +    }
> +
> +    return false;
> }
> 
> uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx,
> @@ -100,12 +107,15 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx,
>         break;
>     case 0xD:
>         if (idx == 0) {
> -            uint64_t host_xcr0 = xgetbv(0);
> -            uint64_t supp_xcr0 = host_xcr0 & (XSTATE_FP_MASK | XSTATE_SSE_MASK |
> -                                  XSTATE_YMM_MASK | XSTATE_BNDREGS_MASK |
> -                                  XSTATE_BNDCSR_MASK | XSTATE_OPMASK_MASK |
> -                                  XSTATE_ZMM_Hi256_MASK | XSTATE_Hi16_ZMM_MASK);
> -            eax &= supp_xcr0;
> +            uint64_t host_xcr0;
> +            if (xgetbv(ecx, 0, &host_xcr0)) {
> +                uint64_t supp_xcr0 = host_xcr0 & (XSTATE_FP_MASK |
> +                                  XSTATE_SSE_MASK | XSTATE_YMM_MASK |
> +                                  XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK |
> +                                  XSTATE_OPMASK_MASK | XSTATE_ZMM_Hi256_MASK |
> +                                  XSTATE_Hi16_ZMM_MASK);
> +                eax &= supp_xcr0;
> +            }
>         } else if (idx == 1) {
>             hv_vmx_read_capability(HV_VMX_CAP_PROCBASED2, &cap);
>             eax &= CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XGETBV1;
> -- 
> 2.20.1 (Apple Git-117)
> 


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^ permalink raw reply	[flat|nested] 4+ messages in thread

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Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-01-13  6:07 [PATCH v3] hvf: guard xgetbv call Hill Ma
2021-01-18 23:34 ` Hill Ma
2021-01-19 12:23 ` Roman Bolshakov
2021-01-20  3:04 ` Cameron Esfahani

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