From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eugeni Dodonov Subject: Re: [PATCH 06/29] drm/i915: add support for SBI ops Date: Fri, 13 Apr 2012 21:28:06 -0300 Message-ID: References: <1334347745-11743-1-git-send-email-eugeni.dodonov@intel.com> <1334347745-11743-7-git-send-email-eugeni.dodonov@intel.com> <1334348797_415329@CP5-2952> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1081928475==" Return-path: Received: from mail-yx0-f177.google.com (mail-yx0-f177.google.com [209.85.213.177]) by gabe.freedesktop.org (Postfix) with ESMTP id B395A9EBCD for ; Fri, 13 Apr 2012 17:28:46 -0700 (PDT) Received: by yenm10 with SMTP id m10so2180749yen.36 for ; Fri, 13 Apr 2012 17:28:46 -0700 (PDT) In-Reply-To: <1334348797_415329@CP5-2952> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org, Eugeni Dodonov List-Id: intel-gfx@lists.freedesktop.org --===============1081928475== Content-Type: multipart/alternative; boundary=20cf303bf54e109cb904bd98acfb --20cf303bf54e109cb904bd98acfb Content-Type: text/plain; charset=ISO-8859-1 On Fri, Apr 13, 2012 at 17:26, Chris Wilson wrote: > On Fri, 13 Apr 2012 17:08:42 -0300, Eugeni Dodonov < > eugeni.dodonov@intel.com> wrote: > > With Lynx Point, we need to use SBI to communicate with the display clock > > control. This commit adds helper functions to access the registers via > > SBI. > > > > v2: de-inline the function and address changes in bits names > > > > v3: protect operations with dpio_lock, increase timeout to 100 for > > paranoia sake. > > > > v1 Reviewed-by: Rodrigo Vivi > > Hmm, busy-waits upon a register change. Does it have to be atomic? Can > it really be called in IRQ context? Can I have a sleepy version that > won't cause audible stutters for the normal case? (Admittedly > single-core processors are history...) > The original version wasn't atomic and wasn't called in IRQ context, but Daniel suggested that I should be more paranoid about this so I followed his idea :). Anyway, both versions (this one and previous one) work; would both you and Daniel be happy if I do another version of this keeping the dpio_lock handling but dropping atomic bits? -- Eugeni Dodonov --20cf303bf54e109cb904bd98acfb Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable
On Fri, Apr 13, 2012 at 17:26, Chris Wilson <chris@chris-w= ilson.co.uk> wrote:
On Fri, 13 Apr 2012 17:08:42 -0300, Eugeni Dodonov <eugeni.dodonov@intel.com> = wrote:
> With Lynx Point, we need to use SBI to communicate with the display cl= ock
> control. This commit adds helper functions to access the registers via=
> SBI.
>
> v2: de-inline the function and address changes in bits names
>
> v3: protect operations with dpio_lock, increase timeout to 100 for
> paranoia sake.
>
> v1 Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

Hmm, busy-waits upon a register change. Does it have to be atomic? Ca= n
it really be called in IRQ context? Can I have a sleepy version that
won't cause audible stutters for the normal case? (Admittedly
single-core processors are history...)

= The original version wasn't atomic and wasn't called in IRQ context= , but Daniel suggested that I should be more paranoid about this so I follo= wed his idea :).

Anyway, both versions (this one and previous one) work;= would both you and Daniel be happy if I do another version of this keeping= the dpio_lock handling but dropping atomic bits?

--
Eugeni Dodonov

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