From mboxrd@z Thu Jan  1 00:00:00 1970
From: Eugeni Dodonov <eugeni@dodonov.net>
Subject: Re: [PATCH 15/29] drm/i915: do not enable PCH PLL on
	pre-haswell
Date: Fri, 13 Apr 2012 21:31:09 -0300
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To: Chris Wilson <chris@chris-wilson.co.uk>
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On Fri, Apr 13, 2012 at 17:55, Chris Wilson <chris@chris-wilson.co.uk>wrote:

> The PLL split needs to be reconsidered in light of Jesse's decoupling
> PLLs from the pipes.
>
> I think we want to start annotating those so that we can keep track of
> CPU vs PCH DP/FDI links and plls.
>

Yes, I'll wait for the PLL patches to land and will refactor this
accordingly. I just didn't wanted to have it blocking my entire series here.

With HSW, on PCH, we only have 1 PLL (iCLKIP), the other ones are on the
CPU.

-- 
Eugeni Dodonov
<http://eugeni.dodonov.net/>

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<div class=3D"gmail_quote">On Fri, Apr 13, 2012 at 17:55, Chris Wilson <spa=
n dir=3D"ltr">&lt;<a href=3D"mailto:chris@chris-wilson.co.uk">chris@chris-w=
ilson.co.uk</a>&gt;</span> wrote:<br><blockquote class=3D"gmail_quote" styl=
e=3D"margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">

The PLL split needs to be reconsidered in light of Jesse&#39;s decoupling<b=
r>
PLLs from the pipes.<br>
<br>
I think we want to start annotating those so that we can keep track of<br>
CPU vs PCH DP/FDI links and plls.<br></blockquote><div><br></div><div>Yes, =
I&#39;ll wait for the PLL patches to land and will refactor this accordingl=
y. I just didn&#39;t wanted to have it blocking my entire series here.</div=
>

<div><br></div><div>With HSW, on PCH, we only have 1 PLL (iCLKIP), the othe=
r ones are on the CPU.</div><div><br></div></div>-- <br>Eugeni Dodonov<a hr=
ef=3D"http://eugeni.dodonov.net/" target=3D"_blank"><br></a><br>

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