From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eugeni Dodonov Subject: Re: Screen corruption regression from 3.0 to 3.1rc4 Date: Thu, 8 Sep 2011 10:43:40 -0300 Message-ID: References: <4E5DD7FA.9000103@spth.de> <4E61F3D8.4080306@spth.de> <4E6206D6.2010709@spth.de> <4E661BF0.1040806@spth.de> <4E67A6FC.5030405@spth.de> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0042151679==" Return-path: Received: from mail-yx0-f177.google.com (mail-yx0-f177.google.com [209.85.213.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 2A6CB9F314 for ; Thu, 8 Sep 2011 06:44:11 -0700 (PDT) Received: by yxi11 with SMTP id 11so662159yxi.36 for ; Thu, 08 Sep 2011 06:44:10 -0700 (PDT) In-Reply-To: <4E67A6FC.5030405@spth.de> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Philipp Klaus Krause Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0042151679== Content-Type: multipart/alternative; boundary=bcaec53af0946132f304ac6e4198 --bcaec53af0946132f304ac6e4198 Content-Type: text/plain; charset=ISO-8859-1 On Wed, Sep 7, 2011 at 14:16, Philipp Klaus Krause wrote: > -----BEGIN PGP SIGNED MESSAGE----- > Hash: SHA1 > > Am 06.09.2011 17:53, schrieb Keith Packard: > > On Tue, 06 Sep 2011 15:11:12 +0200, Philipp Klaus Krause > wrote: > > > >> Here's the output from git-bisect: > >> > >> d74362c9e45689d8d7e3d4bcf6681c4358ef4f2e is the first bad commit > >> commit d74362c9e45689d8d7e3d4bcf6681c4358ef4f2e > >> Author: Keith Packard > >> Date: Thu Jul 28 14:47:14 2011 -0700 > >> > >> drm/i915: Flush other plane register writes > >> > >> Writes to the plane control register are buffered in the chip until > a > >> write to the DSPADDR (pre-965) or DSPSURF (post-965) register > >> occurs. > > > > Makes me wonder if this is some interaction between page flipping and > > frame buffer compression. Could you try turning it off with the > > following kernel command line parameter? > > > > i915.i915_enable_fbc=0 > > > > The problem goes away with i915.i915_enable_fbc=0. I'll probably use > that workaround until the issue is fixed. > Hi, just to help me keep track of this, is there a bug on bugzilla about it? -- Eugeni Dodonov --bcaec53af0946132f304ac6e4198 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable
On Wed, Sep 7, 2011 at 14:16, Philipp Klaus Krau= se <pkk@spth.de>= wrote:
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Hash: SHA1

Am 06.09.2011 17:53, schrieb Keith Packard:
> On Tue, 06 Sep 2011 15:11:12 +0200, = Philipp Klaus Krause <pkk@spth.de>= wrote:
>
>> Here's the output from git-bisect:
>>
>> d74362c9e45689d8d7e3d4bcf6681c4358ef4f2e is the first bad commit >> commit d74362c9e45689d8d7e3d4bcf6681c4358ef4f2e
>> Author: Keith Packard <kei= thp@keithp.com>
>> Date: =A0 Thu Jul 28 14:47:14 2011 -0700
>>
>> =A0 =A0 drm/i915: Flush other plane register writes
>>
>> =A0 =A0 Writes to the plane control register are buffered in the c= hip until a
>> =A0 =A0 write to the DSPADDR (pre-965) or DSPSURF (post-965) regis= ter
>> =A0 =A0 occurs.
>
> Makes me wonder if this is some interaction between page flipping and<= br> > frame buffer compression. Could you try turning it off with the
> following kernel command line parameter?
>
> =A0 =A0 =A0 =A0 i915.i915_enable_fbc=3D0
>

The problem goes away with i915.i915_enable_fbc=3D0. I'll p= robably use
that workaround =A0until the issue is fixed.

Hi,
just to help me keep track of this, is there a bug on bugzilla about = it?

--
Eugeni Dodonov

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