From mboxrd@z Thu Jan 1 00:00:00 1970 From: Linus Walleij Subject: Re: [PATCH 4/6] pinctrl: fsl: add scu based pinctrl support Date: Wed, 2 May 2018 14:27:02 +0200 Message-ID: References: <1524855713-15527-1-git-send-email-aisheng.dong@nxp.com> <1524855713-15527-5-git-send-email-aisheng.dong@nxp.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1524855713-15527-5-git-send-email-aisheng.dong@nxp.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Dong Aisheng Cc: Dong Aisheng , Fabio Estevam , Stefan Agner , "open list:GPIO SUBSYSTEM" , NXP Linux Team , Sascha Hauer , Fabio Estevam , Shawn Guo , Linux ARM List-Id: linux-gpio@vger.kernel.org On Fri, Apr 27, 2018 at 9:01 PM, Dong Aisheng wrote: > Some i.MX SoCs (e.g. MX8QXP and MX8QM) contain a system controller > that is responsible for controlling the pad setting of the IPs that > are present. Communication between the host processor running an OS > and the system controller happens through a SCU protocol. > This patch adds SCU protocol based pinctrl drivers. > > Cc: Linus Walleij > Cc: Shawn Guo > Cc: Fabio Estevam > Cc: Stefan Agner > Cc: Pengutronix Kernel Team > Signed-off-by: Dong Aisheng Patch applied. There was some controversy about i.MX pin control some time back so I hope there is no annoyance from the other maintainers that I just merge stuff from one maintainer. If you don't like the patches you can always tell me to drop them. Yours, Linus Walleij From mboxrd@z Thu Jan 1 00:00:00 1970 From: linus.walleij@linaro.org (Linus Walleij) Date: Wed, 2 May 2018 14:27:02 +0200 Subject: [PATCH 4/6] pinctrl: fsl: add scu based pinctrl support In-Reply-To: <1524855713-15527-5-git-send-email-aisheng.dong@nxp.com> References: <1524855713-15527-1-git-send-email-aisheng.dong@nxp.com> <1524855713-15527-5-git-send-email-aisheng.dong@nxp.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, Apr 27, 2018 at 9:01 PM, Dong Aisheng wrote: > Some i.MX SoCs (e.g. MX8QXP and MX8QM) contain a system controller > that is responsible for controlling the pad setting of the IPs that > are present. Communication between the host processor running an OS > and the system controller happens through a SCU protocol. > This patch adds SCU protocol based pinctrl drivers. > > Cc: Linus Walleij > Cc: Shawn Guo > Cc: Fabio Estevam > Cc: Stefan Agner > Cc: Pengutronix Kernel Team > Signed-off-by: Dong Aisheng Patch applied. There was some controversy about i.MX pin control some time back so I hope there is no annoyance from the other maintainers that I just merge stuff from one maintainer. If you don't like the patches you can always tell me to drop them. Yours, Linus Walleij