From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-ed1-f45.google.com (mail-ed1-f45.google.com [209.85.208.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C6F32185E for ; Thu, 10 Nov 2022 11:39:59 +0000 (UTC) Received: by mail-ed1-f45.google.com with SMTP id l11so2658208edb.4 for ; Thu, 10 Nov 2022 03:39:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=ck1BFgYQUoxfjthSY0Z/ICMvhRDs51HkE0D/E51e4wU=; b=cLoqN/9Hw4WN89uoDoxpq9Ce/Ps341RBpybWaA/Ttn7dX0XjEZSpQMeE/cLupilSy+ h9M/AwRJwi+wD3lcUZtgCbl5J3Y1/4+a+UG987xrzyBKVQSsdTGx1Fm9p56BVwQCgeqw ImbNP+V0cuLG09qZBqDEVWEBH4JmnDYapBzy20rI0QOEnuyEvU41wtqwWtHQ/Ku+SIq6 z/iAwWeg98cPs684u3jM1bZkrHRFlxBeM553WE2HZydhyBqAswoiUSyHfbMc8MScHPVp jTxj/0bSYX2PEajd6PNI/IV0ZBru+l7g17Wn1GCvWMrBI6s8qLNSd3U7dwQx3hiin+sp LiYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ck1BFgYQUoxfjthSY0Z/ICMvhRDs51HkE0D/E51e4wU=; b=5F1Pj4YK14/zM6ewN3eJPmA61aPA642AGr3tBGkUH7jruWzi4kIyIFXARdem7vR+wD E73PWQ5vGm8sdkE6CL0/0fHStINeUy3PlPaZTxGduajRLn5tmxBGdADfBvPyLWFxECv+ ef5stSYn8h2YpucnCWmjve+jst5DbcaHjYjI6eF68zKcoGngqdo51oAoXwK2lhN687Nd ZdznJBHoWwMKSB+r3VZLwhbYRW8c+EX56ZguQkLejHyyao4I3DFpaPcT6DFIkU18Wcyn 0DaBS/5TCNF2uKAMWltpFz3ptceO5U1YNgRcdMv9fa61ZsEojIjXbyEmXJFXUiGK/KlM K6qg== X-Gm-Message-State: ACrzQf1M6xxaiCymBjMeNvUqmI3zJfsk8fOjgcIQGqL2/7bOfmvP+H0p arUaaFo7GQrf+8jYb/c9ToW6IkWCoiGTbCJNOqicxA== X-Google-Smtp-Source: AMsMyM6KPfAGNVILTJIJybxZbWNcNW1j294XPOEkghGZsATADMyuAh5FXMGRYiA9Y0UOLTHKSZCe9zdW3Mb4U369XWo= X-Received: by 2002:a05:6402:4002:b0:463:bc31:2604 with SMTP id d2-20020a056402400200b00463bc312604mr2100488eda.32.1668080397979; Thu, 10 Nov 2022 03:39:57 -0800 (PST) Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-35-f6736dec138e@cerno.tech> In-Reply-To: From: Linus Walleij Date: Thu, 10 Nov 2022 12:39:46 +0100 Message-ID: Subject: Re: [PATCH v2 35/65] clk: ux500: sysctrl: Add a determine_rate hook To: Ulf Hansson Cc: Maxime Ripard , Stephen Boyd , Maxime Coquelin , Chen-Yu Tsai , Daniel Vetter , Nicolas Ferre , Thierry Reding , Jaroslav Kysela , Shawn Guo , Fabio Estevam , Claudiu Beznea , Michael Turquette , Dinh Nguyen , Paul Cercueil , Chunyan Zhang , Manivannan Sadhasivam , =?UTF-8?Q?Andreas_F=C3=A4rber?= , Jonathan Hunter , Abel Vesa , Charles Keepax , Alessandro Zummo , Peter De Schrijver , Orson Zhai , Alexandre Torgue , Prashant Gaikwad , Liam Girdwood , Alexandre Belloni , Samuel Holland , Matthias Brugger , Richard Fitzgerald , Vinod Koul , NXP Linux Team , Sekhar Nori , Kishon Vijay Abraham I , Takashi Iwai , David Airlie , Luca Ceresoli , Jernej Skrabec , Pengutronix Kernel Team , Baolin Wang , David Lechner , Sascha Hauer , Mark Brown , Max Filippov , Geert Uytterhoeven , linux-stm32@st-md-mailman.stormreply.com, alsa-devel@alsa-project.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, linux-mips@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-actions@lists.infradead.org, linux-clk@vger.kernel.org, AngeloGioacchino Del Regno , patches@opensource.cirrus.com, linux-tegra@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Content-Type: text/plain; charset="UTF-8" On Thu, Nov 10, 2022 at 12:29 PM Ulf Hansson wrote: > On Fri, 4 Nov 2022 at 14:32, Maxime Ripard wrote: > > > > The UX500 sysctrl "set_parent" clocks implement a mux with a set_parent > > hook, but doesn't provide a determine_rate implementation. > > > > This is a bit odd, since set_parent() is there to, as its name implies, > > change the parent of a clock. However, the most likely candidate to > > trigger that parent change is a call to clk_set_rate(), with > > determine_rate() figuring out which parent is the best suited for a > > given rate. > > > > The other trigger would be a call to clk_set_parent(), but it's far less > > used, and it doesn't look like there's any obvious user for that clock. > > If I recall correctly, that is the use case we did target for these > types of clocks. See sound/soc/ux500/ux500_ab85xx.c, for example. Hm I am trying to get that driver to work ... from time to time. It's just that ALSA SoC DT has changed to much that it turns out into a complete rewrite :/ So in sound/soc/ux500/mop500_ab8500.c I see this: status = clk_set_parent(drvdata->clk_ptr_intclk, clk_ptr); if (status) (...) and there is elaborate code to switch between "SYSCLK" and "ULPCLK" (ulta-low power clock). Just like you say... however a clock named SYSCLK or ULPCLK does not appear in the code in drivers/clk/ux500 or any DT bindings so... it seems to be non-working for the time being. Yours, Linus Walleij From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A640AC4167D for ; Thu, 10 Nov 2022 11:40:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B2DD810E13B; Thu, 10 Nov 2022 11:40:06 +0000 (UTC) Received: from mail-ed1-x535.google.com (mail-ed1-x535.google.com [IPv6:2a00:1450:4864:20::535]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9073610E13B for ; Thu, 10 Nov 2022 11:39:59 +0000 (UTC) Received: by mail-ed1-x535.google.com with SMTP id z18so2621364edb.9 for ; Thu, 10 Nov 2022 03:39:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=ck1BFgYQUoxfjthSY0Z/ICMvhRDs51HkE0D/E51e4wU=; b=cLoqN/9Hw4WN89uoDoxpq9Ce/Ps341RBpybWaA/Ttn7dX0XjEZSpQMeE/cLupilSy+ h9M/AwRJwi+wD3lcUZtgCbl5J3Y1/4+a+UG987xrzyBKVQSsdTGx1Fm9p56BVwQCgeqw ImbNP+V0cuLG09qZBqDEVWEBH4JmnDYapBzy20rI0QOEnuyEvU41wtqwWtHQ/Ku+SIq6 z/iAwWeg98cPs684u3jM1bZkrHRFlxBeM553WE2HZydhyBqAswoiUSyHfbMc8MScHPVp jTxj/0bSYX2PEajd6PNI/IV0ZBru+l7g17Wn1GCvWMrBI6s8qLNSd3U7dwQx3hiin+sp LiYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ck1BFgYQUoxfjthSY0Z/ICMvhRDs51HkE0D/E51e4wU=; b=ma6mgX9yBPzaQMkNZsPUFnoBrTjghyBfVuAvN9Z9iVqJdgIK6h52PjmX9tngpvgL/P LB9LLYXgZlqKlt0AUQ+0KeNZnrzME0zW5MJfKbTFYfztnsPCU5NGpup1BHGaW8ta/Sru 4D/aBA2wKy8p8sZ4tkqAYwKpQZkLUg/pbW1s838HSpgqSs0QCroPvQN/oioRrRzVFO81 PDrShIzoEc0Tb//ZYPUNRnUuyEfii5DAxa0hEAwjq40mrNj/b6bj0Wm9QMPIpYHRtYgc +rQ3h3OrOsmZbGq2+oMtzdY1Ieutccn6JXstz6GjWNc0inYg4g6jMdFDOYo8LQdswqN7 6mxg== X-Gm-Message-State: ACrzQf1O397uqYwJ7zZPCsV7tSBjsBNQuqYWVGaQngw+itI5DtJDXZ4D kUgvAQPlZNcXCGcErYQsLbDiC5wBo536bK7Dzbvs3w== X-Google-Smtp-Source: AMsMyM6KPfAGNVILTJIJybxZbWNcNW1j294XPOEkghGZsATADMyuAh5FXMGRYiA9Y0UOLTHKSZCe9zdW3Mb4U369XWo= X-Received: by 2002:a05:6402:4002:b0:463:bc31:2604 with SMTP id d2-20020a056402400200b00463bc312604mr2100488eda.32.1668080397979; Thu, 10 Nov 2022 03:39:57 -0800 (PST) MIME-Version: 1.0 References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-35-f6736dec138e@cerno.tech> In-Reply-To: From: Linus Walleij Date: Thu, 10 Nov 2022 12:39:46 +0100 Message-ID: Subject: Re: [PATCH v2 35/65] clk: ux500: sysctrl: Add a determine_rate hook To: Ulf Hansson Content-Type: text/plain; charset="UTF-8" X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexandre Belloni , Prashant Gaikwad , Geert Uytterhoeven , Liam Girdwood , Michael Turquette , Sekhar Nori , Alexandre Torgue , dri-devel@lists.freedesktop.org, Jaroslav Kysela , Paul Cercueil , Max Filippov , Thierry Reding , linux-phy@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Abel Vesa , Kishon Vijay Abraham I , Samuel Holland , Chunyan Zhang , Takashi Iwai , linux-tegra@vger.kernel.org, Jernej Skrabec , Jonathan Hunter , Chen-Yu Tsai , NXP Linux Team , Orson Zhai , linux-mips@vger.kernel.org, Luca Ceresoli , linux-sunxi@lists.linux.dev, linux-rtc@vger.kernel.org, linux-clk@vger.kernel.org, Charles Keepax , alsa-devel@alsa-project.org, Manivannan Sadhasivam , linux-kernel@vger.kernel.org, Sascha Hauer , linux-actions@lists.infradead.org, Richard Fitzgerald , Mark Brown , linux-mediatek@lists.infradead.org, Maxime Ripard , Baolin Wang , Matthias Brugger , Pengutronix Kernel Team , linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno , Alessandro Zummo , Stephen Boyd , patches@opensource.cirrus.com, Peter De Schrijver , Nicolas Ferre , =?UTF-8?Q?Andreas_F=C3=A4rber?= , linux-renesas-soc@vger.kernel.org, Dinh Nguyen , Vinod Koul , Maxime Coquelin , David Lechner , Shawn Guo , Claudiu Beznea Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Thu, Nov 10, 2022 at 12:29 PM Ulf Hansson wrote: > On Fri, 4 Nov 2022 at 14:32, Maxime Ripard wrote: > > > > The UX500 sysctrl "set_parent" clocks implement a mux with a set_parent > > hook, but doesn't provide a determine_rate implementation. > > > > This is a bit odd, since set_parent() is there to, as its name implies, > > change the parent of a clock. However, the most likely candidate to > > trigger that parent change is a call to clk_set_rate(), with > > determine_rate() figuring out which parent is the best suited for a > > given rate. > > > > The other trigger would be a call to clk_set_parent(), but it's far less > > used, and it doesn't look like there's any obvious user for that clock. > > If I recall correctly, that is the use case we did target for these > types of clocks. See sound/soc/ux500/ux500_ab85xx.c, for example. Hm I am trying to get that driver to work ... from time to time. It's just that ALSA SoC DT has changed to much that it turns out into a complete rewrite :/ So in sound/soc/ux500/mop500_ab8500.c I see this: status = clk_set_parent(drvdata->clk_ptr_intclk, clk_ptr); if (status) (...) and there is elaborate code to switch between "SYSCLK" and "ULPCLK" (ulta-low power clock). Just like you say... however a clock named SYSCLK or ULPCLK does not appear in the code in drivers/clk/ux500 or any DT bindings so... it seems to be non-working for the time being. Yours, Linus Walleij From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 759B3C433FE for ; Thu, 10 Nov 2022 11:51:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=D+y0nQ/bT8CrGJF1LMlC/MY0jBkdgHpPYDbQ9xtBOIE=; b=w4jUJT98ddMaZP WEqFD3uGBG0ZMhAWg/kkzd3ACpvAWs5l2A00KVEu9oCZLB9h28BCBGrVPXD1fI1xvJGVS209PCP/H VA0q7nWaThI+zRpRDZliO5I2tdalJfXPiusjvc7gh63H/Wxtw+WUY0Hy+dY+psifJdaIbQ+lb/qh8 rDKk6UufrfOe72QZ91VOwB0ppawSOVnJTC6btLAZBDg8SHrLes/MaVWnoHDAo0lLgRIGsl4gJJOt3 8M/NDuh932912xrJHauQ/gsKJ0GwLEAUtFEvmQf7bmdw3O3PsD8fRtEWCov+cdzyIB/CdT2niEdxY rqugUcx/cL2a4bXyR0Iw==; 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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ck1BFgYQUoxfjthSY0Z/ICMvhRDs51HkE0D/E51e4wU=; b=A3n471FP1aM3K3YbgxJMEOCHTzCv04/q+pixP+JlNZ3tI9SYmO+qC1UL5A6Snnujaj Gic6/HySAsU/Iqst8LWyZey+gWPFhhk859MdXKS4QUzz4paAdBd+5pF3juZkCFC3xTYG bO1orEkP9bCPR6XIA/JNy/oKtoC5UshGm5fFZh/vSGlbhl0nAP31XFwCmNsmpvwKI74t YOSt5oXmbg1m8jKLH3LV3+ooh/qufwzcCpinXrd3jhFQl6prXj+uNeL4CpjwLzUOWrDC nMvSLNAAHOcR1Bht7mP5+hfHvFPn+kpgvwn6f0BItC9w4o3nDAm5oZwiVwevhoWpJyrk P1Rw== X-Gm-Message-State: ACrzQf2+Cxc0ksP53rGmivGsDnr8tUY4ax6yJMkikHy5O0DUDtgHojQd FsttN85/5unNgcYMjDLTqZS+QnDWAJorgD1LiGY7gQ== X-Google-Smtp-Source: AMsMyM6KPfAGNVILTJIJybxZbWNcNW1j294XPOEkghGZsATADMyuAh5FXMGRYiA9Y0UOLTHKSZCe9zdW3Mb4U369XWo= X-Received: by 2002:a05:6402:4002:b0:463:bc31:2604 with SMTP id d2-20020a056402400200b00463bc312604mr2100488eda.32.1668080397979; Thu, 10 Nov 2022 03:39:57 -0800 (PST) MIME-Version: 1.0 References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-35-f6736dec138e@cerno.tech> In-Reply-To: From: Linus Walleij Date: Thu, 10 Nov 2022 12:39:46 +0100 Message-ID: Subject: Re: [PATCH v2 35/65] clk: ux500: sysctrl: Add a determine_rate hook To: Ulf Hansson Cc: Maxime Ripard , Stephen Boyd , Maxime Coquelin , Chen-Yu Tsai , Daniel Vetter , Nicolas Ferre , Thierry Reding , Jaroslav Kysela , Shawn Guo , Fabio Estevam , Claudiu Beznea , Michael Turquette , Dinh Nguyen , Paul Cercueil , Chunyan Zhang , Manivannan Sadhasivam , =?UTF-8?Q?Andreas_F=C3=A4rber?= , Jonathan Hunter , Abel Vesa , Charles Keepax , Alessandro Zummo , Peter De Schrijver , Orson Zhai , Alexandre Torgue , Prashant Gaikwad , Liam Girdwood , Alexandre Belloni , Samuel Holland , Matthias Brugger , Richard Fitzgerald , Vinod Koul , NXP Linux Team , Sekhar Nori , Kishon Vijay Abraham I , Takashi Iwai , David Airlie , Luca Ceresoli , Jernej Skrabec , Pengutronix Kernel Team , Baolin Wang , David Lechner , Sascha Hauer , Mark Brown , Max Filippov , Geert Uytterhoeven , linux-stm32@st-md-mailman.stormreply.com, alsa-devel@alsa-project.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, linux-mips@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-actions@lists.infradead.org, linux-clk@vger.kernel.org, AngeloGioacchino Del Regno , patches@opensource.cirrus.com, linux-tegra@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221110_034000_784360_187ADA85 X-CRM114-Status: GOOD ( 23.66 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On Thu, Nov 10, 2022 at 12:29 PM Ulf Hansson wrote: > On Fri, 4 Nov 2022 at 14:32, Maxime Ripard wrote: > > > > The UX500 sysctrl "set_parent" clocks implement a mux with a set_parent > > hook, but doesn't provide a determine_rate implementation. > > > > This is a bit odd, since set_parent() is there to, as its name implies, > > change the parent of a clock. However, the most likely candidate to > > trigger that parent change is a call to clk_set_rate(), with > > determine_rate() figuring out which parent is the best suited for a > > given rate. > > > > The other trigger would be a call to clk_set_parent(), but it's far less > > used, and it doesn't look like there's any obvious user for that clock. > > If I recall correctly, that is the use case we did target for these > types of clocks. See sound/soc/ux500/ux500_ab85xx.c, for example. Hm I am trying to get that driver to work ... from time to time. It's just that ALSA SoC DT has changed to much that it turns out into a complete rewrite :/ So in sound/soc/ux500/mop500_ab8500.c I see this: status = clk_set_parent(drvdata->clk_ptr_intclk, clk_ptr); if (status) (...) and there is elaborate code to switch between "SYSCLK" and "ULPCLK" (ulta-low power clock). Just like you say... however a clock named SYSCLK or ULPCLK does not appear in the code in drivers/clk/ux500 or any DT bindings so... it seems to be non-working for the time being. Yours, Linus Walleij -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8A6AAC4332F for ; Thu, 10 Nov 2022 19:07:37 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 717EC1670; Thu, 10 Nov 2022 20:06:45 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 717EC1670 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1668107255; bh=WoIZXbVEqfvMNSXd8O2ReI8IMSVrc5fVSYCg9jRtcuQ=; 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Thu, 10 Nov 2022 03:39:57 -0800 (PST) MIME-Version: 1.0 References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-35-f6736dec138e@cerno.tech> In-Reply-To: From: Linus Walleij Date: Thu, 10 Nov 2022 12:39:46 +0100 Message-ID: Subject: Re: [PATCH v2 35/65] clk: ux500: sysctrl: Add a determine_rate hook To: Ulf Hansson Content-Type: text/plain; charset="UTF-8" X-Mailman-Approved-At: Thu, 10 Nov 2022 20:06:20 +0100 Cc: Alexandre Belloni , Prashant Gaikwad , Geert Uytterhoeven , Liam Girdwood , Michael Turquette , Sekhar Nori , Alexandre Torgue , dri-devel@lists.freedesktop.org, Paul Cercueil , Max Filippov , Thierry Reding , linux-phy@lists.infradead.org, David Airlie , Fabio Estevam , linux-stm32@st-md-mailman.stormreply.com, Abel Vesa , Kishon Vijay Abraham I , Samuel Holland , Chunyan Zhang , Takashi Iwai , linux-tegra@vger.kernel.org, Jernej Skrabec , Jonathan Hunter , Chen-Yu Tsai , NXP Linux Team , Orson Zhai , linux-mips@vger.kernel.org, Luca Ceresoli , linux-sunxi@lists.linux.dev, linux-rtc@vger.kernel.org, linux-clk@vger.kernel.org, Charles Keepax , Daniel Vetter , alsa-devel@alsa-project.org, Manivannan Sadhasivam , linux-kernel@vger.kernel.org, Sascha Hauer , linux-actions@lists.infradead.org, Richard Fitzgerald , Mark Brown , linux-mediatek@lists.infradead.org, Maxime Ripard , Baolin Wang , Matthias Brugger , Pengutronix Kernel Team , linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno , Alessandro Zummo , Stephen Boyd , patches@opensource.cirrus.com, Peter De Schrijver , Nicolas Ferre , =?UTF-8?Q?Andreas_F=C3=A4rber?= , linux-renesas-soc@vger.kernel.org, Dinh Nguyen , Vinod Koul , Maxime Coquelin , David Lechner , Shawn Guo , Claudiu Beznea X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On Thu, Nov 10, 2022 at 12:29 PM Ulf Hansson wrote: > On Fri, 4 Nov 2022 at 14:32, Maxime Ripard wrote: > > > > The UX500 sysctrl "set_parent" clocks implement a mux with a set_parent > > hook, but doesn't provide a determine_rate implementation. > > > > This is a bit odd, since set_parent() is there to, as its name implies, > > change the parent of a clock. However, the most likely candidate to > > trigger that parent change is a call to clk_set_rate(), with > > determine_rate() figuring out which parent is the best suited for a > > given rate. > > > > The other trigger would be a call to clk_set_parent(), but it's far less > > used, and it doesn't look like there's any obvious user for that clock. > > If I recall correctly, that is the use case we did target for these > types of clocks. See sound/soc/ux500/ux500_ab85xx.c, for example. Hm I am trying to get that driver to work ... from time to time. It's just that ALSA SoC DT has changed to much that it turns out into a complete rewrite :/ So in sound/soc/ux500/mop500_ab8500.c I see this: status = clk_set_parent(drvdata->clk_ptr_intclk, clk_ptr); if (status) (...) and there is elaborate code to switch between "SYSCLK" and "ULPCLK" (ulta-low power clock). Just like you say... however a clock named SYSCLK or ULPCLK does not appear in the code in drivers/clk/ux500 or any DT bindings so... it seems to be non-working for the time being. Yours, Linus Walleij