From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-lj1-f172.google.com (mail-lj1-f172.google.com [209.85.208.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3276A72 for ; Thu, 8 Jul 2021 22:13:38 +0000 (UTC) Received: by mail-lj1-f172.google.com with SMTP id 11so764941ljv.1 for ; Thu, 08 Jul 2021 15:13:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=nE/bFkgV+CYyOG6TwWxtlr+Mc8KHKQEDxbgNfmmh5t8=; b=TCXVRybxOPCWyn5Fcpt7DLS5PzuNFjRAlA7TkwId3TvwZ+6LIkeuq9VrgWlHC8HzM3 kh/8ybwbp1Ngd2UhM6rjV1eb32H8SHq3dve4eV3JeRS4JOhCoqQi3/u/1Hwsmt9leWtX ZvhoC6zrzXDginuLeGBOJ8M/6YMGNt05Pe1QC9WHHFv/mdcA537XTzhi1iqNKLJo3RV5 zQ2vxdc7tmX1zJFYKBXwEia6o8ObHl86h+1YEoFdcCfnoP/vonNbLJFniNFEMrWZNicl r4YyYosYWFeQJIOWV2wA+s2bsg6nOC+7nVZke9aci3i3AZs8iuSlyPUXWc1W6yUn6kE7 HmyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=nE/bFkgV+CYyOG6TwWxtlr+Mc8KHKQEDxbgNfmmh5t8=; b=n1GryS1TjGO4iZ09/kgLxpsEwk1t5iprdHExeP3xms9snP+GTesxzSx5b8ySH0Cmpr Da5kGYfL7ake0c5TgJbZv77t+dUw+awqtEH4h1gDTT2t9ya3f1apnDmNLQFAgI9bzcoX g6ecYTFPNO87QFgNJAW5AMCIqsSKT1o8kn1V+i0hOTVFrOiNCn8l0ZhEkQOYUxjFCYXi R0NXL1x2HKjSBrIhwvyMaQGOOAnDHbGC4cX3T0pQ8wXGUjAmmj4rXIkyiFTaVsapgutq ieBeGyceexBSqcLtj5+wkfQhYq4cFNnR/HVlhTT4VLk0j/5QaJ9TDdajhG1hWOfJD18J Phwg== X-Gm-Message-State: AOAM531FO6dcHF19wqv0ouX0lvj8c/6ZS3Ch8AMcBsi66mTUmT6QQ9Mr tDgdWVdfq+PdUdcGet3UBP8FVUhSw9pco4evGG0ENw== X-Google-Smtp-Source: ABdhPJxUnLADPLUCBGGDFMMNlP/nY+G1e+As370VwzZM7F+jBFlMPnz/9Oo2bKoTY9u5blIbXKaPHOg9OuHAWjqGB4o= X-Received: by 2002:a2e:9210:: with SMTP id k16mr24850466ljg.438.1625782416167; Thu, 08 Jul 2021 15:13:36 -0700 (PDT) Precedence: bulk X-Mailing-List: ksummit@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <1f2a62c19845e4602817c2130d47bbea02d04d1d.camel@HansenPartnership.com> <20210707203827.GI18396@quack2.suse.cz> In-Reply-To: From: Linus Walleij Date: Fri, 9 Jul 2021 00:13:25 +0200 Message-ID: Subject: Re: [TECH TOPIC] Rust for Linux To: Miguel Ojeda Cc: Greg KH , Bartosz Golaszewski , Kees Cook , Wedson Almeida Filho , Jan Kara , James Bottomley , Julia Lawall , Laurent Pinchart , Roland Dreier , ksummit@lists.linux.dev, Viresh Kumar Content-Type: text/plain; charset="UTF-8" On Thu, Jul 8, 2021 at 10:34 PM Miguel Ojeda wrote: > On Thu, Jul 8, 2021 at 9:49 PM Linus Walleij wrote: > > > > With my GPIO maintainer hat on I'd say a GPIO driver would be quite > > interesting to look at. We are two GPIO maintainers and Bartosz is > > doing the heavy lifting for the moment so I'm connecting Bartosz to this > > discussion. (Now he has to read through the whole backlog, > > sorry Bart!) > > > > This is not to say I promise we will merge it or so, but I just generically > > like new approaches to old problems so I like this whole thing > > overall, despite being critical to some details. > > > > I am also trying to learn Rust. Baby steps. > > Thanks a lot for this offer Linus. > > Do you have a particular one in mind? Ideally, it would be one that > has QEMU support or a test suite of some kind, or at least one that > you can easily test for us etc. I don't use QEMU for GPIO development, we are so close to the real hardware that it's often not appropriate. We have a testing module but that is not a real world driver and would not meet the expectations set here of creating real hardware drivers. I have seen that QEMU has a piece of code for the Arm PrimeCell PL061 GPIO block which corresponds to drivers/gpio/gpio-pl061.c Note that this hardware apart from being used in all Arm reference designs is used on ARMv4T systems that are not supported by LLVM but only GCC, which might complicate things. I am a bit oldschool in that I think real hardware is awesome to test on. GPIO drivers exist in many shapes and sizes, some are directly memory-mapped to hardware registers, some are I2C or SPI. Most Raspberry Pis and Beagle Boards have them, albeit the on-chip GPIOs are often also pin controllers which complicates things. Expanders on I2C and SPI will be simpler. Maybe look for an I2C or SPI expander that has no existing kernel support and implement it in Rust? Yours, Linus Walleij