From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754819AbaIDRbF (ORCPT ); Thu, 4 Sep 2014 13:31:05 -0400 Received: from mail-ob0-f180.google.com ([209.85.214.180]:57958 "EHLO mail-ob0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751764AbaIDRbD (ORCPT ); Thu, 4 Sep 2014 13:31:03 -0400 MIME-Version: 1.0 In-Reply-To: References: <1409159852-7249-1-git-send-email-mathieu.poirier@linaro.org> <1409159852-7249-8-git-send-email-mathieu.poirier@linaro.org> Date: Thu, 4 Sep 2014 19:31:02 +0200 Message-ID: Subject: Re: [PATCH 07/11 v5] coresight-etm: add CoreSight ETM/PTM driver From: Linus Walleij To: Mathieu Poirier Cc: Thomas Petazzoni , Will Deacon , Russell King - ARM Linux , Greg KH , Arnd Bergmann , John Stultz , Pratik Patel , Vikas Varshney , Al Grant , Jonas Svennebring , James King , Panchaxari Prasannamurthy Tumkur , Kaixu Xia , Marcin Jabrzyk , "r.sengupta@samsung.com" , Robert Marklund , Tony Armitstead , Patch Tracking , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 4, 2014 at 7:19 PM, Mathieu Poirier wrote: > [Me]: >> I would rewrite the last function like this: >> >> static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off) >> { >> u32 val; >> >> if (drvdata->use_cp14) >> asm_volatile()... >> else >> val = readl_relaxed(drvdata->base + off); >> return val; >> } > > That unfortunately won't work. "u32 off" is a numerical value and it > works well in the case were CP14 accesses aren't needed. On the flip > side that numerical value isn't sufficient to deduce all 3 arguments > (crn, crm, op2) required by instructions mcr/mrc for the right access > to happen - there is simply no correlation between the offset of an > APB bus memory mapped address and the corresponding CP14 access. You're right, I oversimplified it in my head grossly... Jens Wiklander pointed me to the macros used in OP-TEE for CP15 access with the same unpredictable patterns: https://github.com/OP-TEE/optee_os/tree/master/core/arch/arm32/include Yours, Linus Walleij From mboxrd@z Thu Jan 1 00:00:00 1970 From: linus.walleij@linaro.org (Linus Walleij) Date: Thu, 4 Sep 2014 19:31:02 +0200 Subject: [PATCH 07/11 v5] coresight-etm: add CoreSight ETM/PTM driver In-Reply-To: References: <1409159852-7249-1-git-send-email-mathieu.poirier@linaro.org> <1409159852-7249-8-git-send-email-mathieu.poirier@linaro.org> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, Sep 4, 2014 at 7:19 PM, Mathieu Poirier wrote: > [Me]: >> I would rewrite the last function like this: >> >> static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off) >> { >> u32 val; >> >> if (drvdata->use_cp14) >> asm_volatile()... >> else >> val = readl_relaxed(drvdata->base + off); >> return val; >> } > > That unfortunately won't work. "u32 off" is a numerical value and it > works well in the case were CP14 accesses aren't needed. On the flip > side that numerical value isn't sufficient to deduce all 3 arguments > (crn, crm, op2) required by instructions mcr/mrc for the right access > to happen - there is simply no correlation between the offset of an > APB bus memory mapped address and the corresponding CP14 access. You're right, I oversimplified it in my head grossly... Jens Wiklander pointed me to the macros used in OP-TEE for CP15 access with the same unpredictable patterns: https://github.com/OP-TEE/optee_os/tree/master/core/arch/arm32/include Yours, Linus Walleij