From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751538AbaAOHji (ORCPT ); Wed, 15 Jan 2014 02:39:38 -0500 Received: from mail-ob0-f182.google.com ([209.85.214.182]:57758 "EHLO mail-ob0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750928AbaAOHjf (ORCPT ); Wed, 15 Jan 2014 02:39:35 -0500 MIME-Version: 1.0 In-Reply-To: <1389207661.10754.42.camel@host5.omatika.ru> References: <1386901645-28895-1-git-send-email-ynvich@gmail.com> <1387309071-22382-1-git-send-email-ynvich@gmail.com> <1387309071-22382-12-git-send-email-ynvich@gmail.com> <1389207661.10754.42.camel@host5.omatika.ru> Date: Wed, 15 Jan 2014 08:39:35 +0100 Message-ID: Subject: Re: [PATCH v3 11/21] ARM: pxa: support ICP DAS LP-8x4x FPGA irq From: Linus Walleij To: Sergei Ianovich Cc: "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Arnd Bergmann , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Rob Landley , Russell King , Thomas Gleixner , Grant Likely , "open list:OPEN FIRMWARE AND..." , "open list:DOCUMENTATION" Content-Type: text/plain; charset=ISO-8859-1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jan 8, 2014 at 8:01 PM, Sergei Ianovich wrote: > On Thu, 2014-01-02 at 13:32 +0100, Linus Walleij wrote: >> On Tue, Dec 17, 2013 at 8:37 PM, Sergei Ianovich wrote: >> Usually combined GPIO+IRQ controllers are put into drivers/gpio but >> this is a bit special as it seems to handle also non-GPIO-related IRQs >> so let's get some input on this. > > This one is a plain IRQ controller. It has simple input lines, not GPIO > pins. The chip reports its status to upper level interrupt controller. > The upper level controller is PXA GPIO in this case. Hm I don't know why I was deluded into thinking this had something to do with GPIO. I must have been soft in the head. Sorry about all those comments ... I'll re-read the irqchip driver v3.1. Yours, Linus Walleij From mboxrd@z Thu Jan 1 00:00:00 1970 From: Linus Walleij Subject: Re: [PATCH v3 11/21] ARM: pxa: support ICP DAS LP-8x4x FPGA irq Date: Wed, 15 Jan 2014 08:39:35 +0100 Message-ID: References: <1386901645-28895-1-git-send-email-ynvich@gmail.com> <1387309071-22382-1-git-send-email-ynvich@gmail.com> <1387309071-22382-12-git-send-email-ynvich@gmail.com> <1389207661.10754.42.camel@host5.omatika.ru> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Return-path: In-Reply-To: <1389207661.10754.42.camel@host5.omatika.ru> Sender: linux-doc-owner@vger.kernel.org To: Sergei Ianovich Cc: "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Arnd Bergmann , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Rob Landley , Russell King , Thomas Gleixner , Grant Likely , "open list:OPEN FIRMWARE AND..." , "open list:DOCUMENTATION" List-Id: devicetree@vger.kernel.org On Wed, Jan 8, 2014 at 8:01 PM, Sergei Ianovich wrote: > On Thu, 2014-01-02 at 13:32 +0100, Linus Walleij wrote: >> On Tue, Dec 17, 2013 at 8:37 PM, Sergei Ianovich wrote: >> Usually combined GPIO+IRQ controllers are put into drivers/gpio but >> this is a bit special as it seems to handle also non-GPIO-related IRQs >> so let's get some input on this. > > This one is a plain IRQ controller. It has simple input lines, not GPIO > pins. The chip reports its status to upper level interrupt controller. > The upper level controller is PXA GPIO in this case. Hm I don't know why I was deluded into thinking this had something to do with GPIO. I must have been soft in the head. Sorry about all those comments ... I'll re-read the irqchip driver v3.1. Yours, Linus Walleij From mboxrd@z Thu Jan 1 00:00:00 1970 From: linus.walleij@linaro.org (Linus Walleij) Date: Wed, 15 Jan 2014 08:39:35 +0100 Subject: [PATCH v3 11/21] ARM: pxa: support ICP DAS LP-8x4x FPGA irq In-Reply-To: <1389207661.10754.42.camel@host5.omatika.ru> References: <1386901645-28895-1-git-send-email-ynvich@gmail.com> <1387309071-22382-1-git-send-email-ynvich@gmail.com> <1387309071-22382-12-git-send-email-ynvich@gmail.com> <1389207661.10754.42.camel@host5.omatika.ru> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, Jan 8, 2014 at 8:01 PM, Sergei Ianovich wrote: > On Thu, 2014-01-02 at 13:32 +0100, Linus Walleij wrote: >> On Tue, Dec 17, 2013 at 8:37 PM, Sergei Ianovich wrote: >> Usually combined GPIO+IRQ controllers are put into drivers/gpio but >> this is a bit special as it seems to handle also non-GPIO-related IRQs >> so let's get some input on this. > > This one is a plain IRQ controller. It has simple input lines, not GPIO > pins. The chip reports its status to upper level interrupt controller. > The upper level controller is PXA GPIO in this case. Hm I don't know why I was deluded into thinking this had something to do with GPIO. I must have been soft in the head. Sorry about all those comments ... I'll re-read the irqchip driver v3.1. Yours, Linus Walleij