From mboxrd@z Thu Jan 1 00:00:00 1970 From: Linus Walleij Subject: Re: [PATCH 0/5] pinctrl: meson: Add support for TEST_N gpio Date: Fri, 3 Aug 2018 19:10:22 +0200 Message-ID: References: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: In-Reply-To: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org To: Neil Armstrong , Carlo Caione Cc: Kevin Hilman , "open list:ARM/Amlogic Meson..." , Linux ARM , "open list:GPIO SUBSYSTEM" , "linux-kernel@vger.kernel.org" List-Id: linux-gpio@vger.kernel.org On Wed, Aug 1, 2018 at 12:00 PM Neil Armstrong wrote: > The Amlogic Meson GX and AXG SoCs needs to do a Secure Monitor call to > set the TEST_N pin direction. > This patchset : > - adds the Secure Monitor call > - adds support int the pinctrl-meson common code > - adds support for GXBB, GXL and AGX SoCs A lot of trouble to access a single GPIO pin (I guess _N means "active low"?) Is this line used for something especially important? Would be nice to include in some commit message like patch 1/5 why we invest so much energy to accessing this pin. Just curious. If you're just aiming for feature completion, that is a good reason as well :D Yours, Linus Walleij From mboxrd@z Thu Jan 1 00:00:00 1970 From: linus.walleij@linaro.org (Linus Walleij) Date: Fri, 3 Aug 2018 19:10:22 +0200 Subject: [PATCH 0/5] pinctrl: meson: Add support for TEST_N gpio In-Reply-To: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> References: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, Aug 1, 2018 at 12:00 PM Neil Armstrong wrote: > The Amlogic Meson GX and AXG SoCs needs to do a Secure Monitor call to > set the TEST_N pin direction. > This patchset : > - adds the Secure Monitor call > - adds support int the pinctrl-meson common code > - adds support for GXBB, GXL and AGX SoCs A lot of trouble to access a single GPIO pin (I guess _N means "active low"?) Is this line used for something especially important? Would be nice to include in some commit message like patch 1/5 why we invest so much energy to accessing this pin. Just curious. If you're just aiming for feature completion, that is a good reason as well :D Yours, Linus Walleij From mboxrd@z Thu Jan 1 00:00:00 1970 From: linus.walleij@linaro.org (Linus Walleij) Date: Fri, 3 Aug 2018 19:10:22 +0200 Subject: [PATCH 0/5] pinctrl: meson: Add support for TEST_N gpio In-Reply-To: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> References: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> Message-ID: To: linus-amlogic@lists.infradead.org List-Id: linus-amlogic.lists.infradead.org On Wed, Aug 1, 2018 at 12:00 PM Neil Armstrong wrote: > The Amlogic Meson GX and AXG SoCs needs to do a Secure Monitor call to > set the TEST_N pin direction. > This patchset : > - adds the Secure Monitor call > - adds support int the pinctrl-meson common code > - adds support for GXBB, GXL and AGX SoCs A lot of trouble to access a single GPIO pin (I guess _N means "active low"?) Is this line used for something especially important? Would be nice to include in some commit message like patch 1/5 why we invest so much energy to accessing this pin. Just curious. If you're just aiming for feature completion, that is a good reason as well :D Yours, Linus Walleij