From mboxrd@z Thu Jan 1 00:00:00 1970 From: Linus Walleij Subject: Re: [PATCH v5 5/9] Documentation: dt-bindings: Add IRQ related properties of STM32 pinctrl Date: Tue, 13 Sep 2016 10:18:20 +0200 Message-ID: References: <1473432124-6784-1-git-send-email-alexandre.torgue@st.com> <1473432124-6784-6-git-send-email-alexandre.torgue@st.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: In-Reply-To: <1473432124-6784-6-git-send-email-alexandre.torgue@st.com> Sender: linux-kernel-owner@vger.kernel.org To: Alexandre TORGUE Cc: Maxime Coquelin , Thomas Gleixner , Jason Cooper , Marc Zyngier , Mark Rutland , Rob Herring , "linux-gpio@vger.kernel.org" , Arnd Bergmann , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , Daniel Thompson , Bruno Herrera , Lee Jones List-Id: linux-gpio@vger.kernel.org On Fri, Sep 9, 2016 at 4:42 PM, Alexandre TORGUE wrote: > Signed-off-by: Maxime Coquelin > Acked-by: Rob Herring > Signed-off-by: Alexandre TORGUE > > diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt > index 587bffb..a0eed99 100644 > --- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt > +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt > @@ -14,6 +14,9 @@ Required properies: > - #size-cells : The value of this property must be 1 > - ranges : defines mapping between pin controller node (parent) to > gpio-bank node (children). > + - interrupt-parent: phandle of the interrupt parent to which the external > + GPIO interrupts are forwarded to. > + - st,syscfg: phandle of the syscfg node used for IRQ mux selection. Actually this doc is incomplete. This is a phandle + offset, not just a phandle. It is a small detail so I don't care much, either send a patch to fix up this doc (I have already merged it) or patch the driver to not retrieve the offset and instead use #define SYSCFG_OFFSET 0x08 or something... Yours, Linus Walleij From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756148AbcIMISY (ORCPT ); Tue, 13 Sep 2016 04:18:24 -0400 Received: from mail-oi0-f52.google.com ([209.85.218.52]:34139 "EHLO mail-oi0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755686AbcIMISV (ORCPT ); Tue, 13 Sep 2016 04:18:21 -0400 MIME-Version: 1.0 In-Reply-To: <1473432124-6784-6-git-send-email-alexandre.torgue@st.com> References: <1473432124-6784-1-git-send-email-alexandre.torgue@st.com> <1473432124-6784-6-git-send-email-alexandre.torgue@st.com> From: Linus Walleij Date: Tue, 13 Sep 2016 10:18:20 +0200 Message-ID: Subject: Re: [PATCH v5 5/9] Documentation: dt-bindings: Add IRQ related properties of STM32 pinctrl To: Alexandre TORGUE Cc: Maxime Coquelin , Thomas Gleixner , Jason Cooper , Marc Zyngier , Mark Rutland , Rob Herring , "linux-gpio@vger.kernel.org" , Arnd Bergmann , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , Daniel Thompson , Bruno Herrera , Lee Jones Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 9, 2016 at 4:42 PM, Alexandre TORGUE wrote: > Signed-off-by: Maxime Coquelin > Acked-by: Rob Herring > Signed-off-by: Alexandre TORGUE > > diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt > index 587bffb..a0eed99 100644 > --- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt > +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt > @@ -14,6 +14,9 @@ Required properies: > - #size-cells : The value of this property must be 1 > - ranges : defines mapping between pin controller node (parent) to > gpio-bank node (children). > + - interrupt-parent: phandle of the interrupt parent to which the external > + GPIO interrupts are forwarded to. > + - st,syscfg: phandle of the syscfg node used for IRQ mux selection. Actually this doc is incomplete. This is a phandle + offset, not just a phandle. It is a small detail so I don't care much, either send a patch to fix up this doc (I have already merged it) or patch the driver to not retrieve the offset and instead use #define SYSCFG_OFFSET 0x08 or something... Yours, Linus Walleij From mboxrd@z Thu Jan 1 00:00:00 1970 From: linus.walleij@linaro.org (Linus Walleij) Date: Tue, 13 Sep 2016 10:18:20 +0200 Subject: [PATCH v5 5/9] Documentation: dt-bindings: Add IRQ related properties of STM32 pinctrl In-Reply-To: <1473432124-6784-6-git-send-email-alexandre.torgue@st.com> References: <1473432124-6784-1-git-send-email-alexandre.torgue@st.com> <1473432124-6784-6-git-send-email-alexandre.torgue@st.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, Sep 9, 2016 at 4:42 PM, Alexandre TORGUE wrote: > Signed-off-by: Maxime Coquelin > Acked-by: Rob Herring > Signed-off-by: Alexandre TORGUE > > diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt > index 587bffb..a0eed99 100644 > --- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt > +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt > @@ -14,6 +14,9 @@ Required properies: > - #size-cells : The value of this property must be 1 > - ranges : defines mapping between pin controller node (parent) to > gpio-bank node (children). > + - interrupt-parent: phandle of the interrupt parent to which the external > + GPIO interrupts are forwarded to. > + - st,syscfg: phandle of the syscfg node used for IRQ mux selection. Actually this doc is incomplete. This is a phandle + offset, not just a phandle. It is a small detail so I don't care much, either send a patch to fix up this doc (I have already merged it) or patch the driver to not retrieve the offset and instead use #define SYSCFG_OFFSET 0x08 or something... Yours, Linus Walleij