From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9B66C4361B for ; Fri, 11 Dec 2020 23:43:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 805D323359 for ; Fri, 11 Dec 2020 23:43:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437024AbgLKXHD (ORCPT ); Fri, 11 Dec 2020 18:07:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39710 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2437056AbgLKXGk (ORCPT ); Fri, 11 Dec 2020 18:06:40 -0500 Received: from mail-lf1-x142.google.com (mail-lf1-x142.google.com [IPv6:2a00:1450:4864:20::142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 922CEC0613D6 for ; Fri, 11 Dec 2020 15:05:59 -0800 (PST) Received: by mail-lf1-x142.google.com with SMTP id m19so15569796lfb.1 for ; Fri, 11 Dec 2020 15:05:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=VPtMdGDRGuPEDGFmGnMvWlPbwtTye9nLOQ6zo2Mm3+s=; b=Tkxo8ubznZ/ihmwdGKwM0mnEC/9Inp+35eFt9HZ4SSZ8hVM2LajmncJVbJ8vVT9g7Y Bzevfd9OPqrtR7vCmS+Qyq9Q66deWC7tSue0PfNWMwfZw+4NMc6PVS3sMyL2AEgdJLVQ bs5Q8FBifb8fdc0t8MaeXkMsujAtyFcoVR93gBdo3ts2xXxu84uSsSc7nvDA31bMjA0T zyDFK0CL+q56OwKRrpoRUSRwndyj0xZxR5Awy2lgC48HQMSVM7YiZzG6POcphjwjahwN rIia2uSFw7gU6bSo0F+0LAg6gQCxPIftjemfQbohCg3tLqSw2jxFdpQ51oypEL8ksD+W HPYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=VPtMdGDRGuPEDGFmGnMvWlPbwtTye9nLOQ6zo2Mm3+s=; b=kw8e0uZ7F4bKYt5IEbdWEVKs2Q5JMOMJb43JpmXlmKVfd8GmF/laWurIw7ZTCwnO0a AU49T8OkCK6A22WC1u7UGzEZ5XQ1Cs5KQmCYN7cAFXx+HuDFCqCCi5eMBckeJee74r9G IH+gtoEV8e6UbrmFi+a8xSTMTh66FrxhgD2D52pGKd3CVchDxXzpDSmOLwmPJz4FedlO waT5dHPLmC2rVHjqV50mqh74VtkSx6ad+jwEmHArVmQN1vUdOjSyzj1dQe/D96NePev1 oscVNv705ZElaTcHF3MMeoj/HZbVL/yb4c0H932PD3/9PPk0NO82l1XbNZldDm2kJfXF DcuA== X-Gm-Message-State: AOAM532QR0GHTnI60Cm5bZeJ95ojxfL0wNWWQimdYZ2mQW3QNMNvvkpy kh42SYUl7NRuFZnvF0gMjpYVXEMFoZYKvwiRV03uDQ== X-Google-Smtp-Source: ABdhPJyG4JiWO5sICrhd+prNYw2YnrYATbC3tLV3EewLAZiuaES/S08tUz/dKCFSdAJ+lv7Ji7zysfJtwScFy5P1idI= X-Received: by 2002:a19:7d84:: with SMTP id y126mr5515292lfc.586.1607727957931; Fri, 11 Dec 2020 15:05:57 -0800 (PST) MIME-Version: 1.0 References: <20201211094138.2863677-1-nobuhiro1.iwamatsu@toshiba.co.jp> <20201211094138.2863677-2-nobuhiro1.iwamatsu@toshiba.co.jp> In-Reply-To: <20201211094138.2863677-2-nobuhiro1.iwamatsu@toshiba.co.jp> From: Linus Walleij Date: Sat, 12 Dec 2020 00:05:47 +0100 Message-ID: Subject: Re: [PATCH v4 1/4] dt-bindings: gpio: Add bindings for Toshiba Visconti GPIO Controller To: Nobuhiro Iwamatsu , Marc Zyngier Cc: Rob Herring , Punit Agrawal , yuji2.ishikawa@toshiba.co.jp, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux ARM , "open list:GPIO SUBSYSTEM" , "linux-kernel@vger.kernel.org" , Rob Herring Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Looping in Marc here: On Fri, Dec 11, 2020 at 1:43 AM Nobuhiro Iwamatsu wrote: > Add bindings for the Toshiba Visconti GPIO Controller. > > Signed-off-by: Nobuhiro Iwamatsu > Reviewed-by: Rob Herring > Reviewed-by: Punit Agrawal (...) > + interrupts = , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; This is an hierarchical IRQ controller. (These IRQs are mapped 1-to-1 to IRQ lines.) I was under the impression that we don't encode interrupts into the GPIO controller like this when we have that. Instead, hardcode these into the driver. The compatible string gives away how the local offsets map to the GIC IRQs. Add no interrupts to the node but make sure that the GIC is the parent. (Should be default.) Compare e.g. Documentation/devicetree/bindings/gpio/intel,ixp4xx-gpio.txt Which has a similar "some hierarchical IRQs" setup. Yours, Linus Walleij From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68CEBC433FE for ; Fri, 11 Dec 2020 23:07:24 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EEE7521707 for ; Fri, 11 Dec 2020 23:07:23 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EEE7521707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:To:Subject:Message-ID:Date:From:In-Reply-To: References:MIME-Version:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=SumsUPBj6XY7m1Pe0M1s7/VB/SJiEgco3NXUqsW3kRs=; b=hLU3kBeAh3GzGeqA6MoWdPNeC 8DYAAAg/CLj04f2aeC7LKfJ8VKBhaRfzFJ9GPCCvirCCzSzwLAF+qgSGr/dK5Tjbfm4LVfNdh0Vle 7TMrtkvRYsBHtHTxpYmYk+97jwneEzqDqExUo70dBdHAUwD21lzfQK2PibnOFanjvV75pppaGIEKl IZC/P6dSFmfb+MCkr2tNUYTDw8mEXpezzOncXLepoh2Pz9neAPoH8D0dF0sirPlAGevhasP0lsaJX zDxsgD0MAedmP1BuDMd6fxtbvVnmlCzD908QOWQNwpyfvGfarxEkZQKha83HKPg7yHBltc4zblWYe xu0s8awWA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1knrUB-0005qT-0M; Fri, 11 Dec 2020 23:06:03 +0000 Received: from mail-lf1-x144.google.com ([2a00:1450:4864:20::144]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1knrU7-0005qB-LM for linux-arm-kernel@lists.infradead.org; Fri, 11 Dec 2020 23:06:01 +0000 Received: by mail-lf1-x144.google.com with SMTP id m25so15506950lfc.11 for ; Fri, 11 Dec 2020 15:05:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=VPtMdGDRGuPEDGFmGnMvWlPbwtTye9nLOQ6zo2Mm3+s=; b=Tkxo8ubznZ/ihmwdGKwM0mnEC/9Inp+35eFt9HZ4SSZ8hVM2LajmncJVbJ8vVT9g7Y Bzevfd9OPqrtR7vCmS+Qyq9Q66deWC7tSue0PfNWMwfZw+4NMc6PVS3sMyL2AEgdJLVQ bs5Q8FBifb8fdc0t8MaeXkMsujAtyFcoVR93gBdo3ts2xXxu84uSsSc7nvDA31bMjA0T zyDFK0CL+q56OwKRrpoRUSRwndyj0xZxR5Awy2lgC48HQMSVM7YiZzG6POcphjwjahwN rIia2uSFw7gU6bSo0F+0LAg6gQCxPIftjemfQbohCg3tLqSw2jxFdpQ51oypEL8ksD+W HPYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=VPtMdGDRGuPEDGFmGnMvWlPbwtTye9nLOQ6zo2Mm3+s=; b=s8rt1nFYYxfnFkG5/cACvvqZ3Kt3c91B28EMep4EXYKtmPsT6VZ2uEjvNtPZCq1g8H QsxFuFhwsL6jRfF8eClMN+7tj1j/QRMseAWHXjTC/ACg3glB6/xAmIF6FFMNg9OucwSX UxIF0RqjlAy4NIOzXCzt/3P6mMjMFAGic5kYFuKCjmQ4ILblAKwzFZqBjvutLnAfpwLH +5Et83Xzy3VPwHSiJkCHLXNxjq0/x5zVAZ5sTGv9MybgNohQyDH/TrsJSEpJFz5670ot zxPziI7niA1Lct2wtkG0m1C8S1cE+RUG0SY3EFrhFq79H8vtgBjwUclNJnhfsxd3USRK MOVg== X-Gm-Message-State: AOAM531xiJE6PL3w3NP/jFLWQ9Lr7RVcQh/msvvSYQkfSKWnhUZdEclw zsXzGpY1fLlG/nUDkyQ9a/hTGT+ysqzPw73k0mbO7A== X-Google-Smtp-Source: ABdhPJyG4JiWO5sICrhd+prNYw2YnrYATbC3tLV3EewLAZiuaES/S08tUz/dKCFSdAJ+lv7Ji7zysfJtwScFy5P1idI= X-Received: by 2002:a19:7d84:: with SMTP id y126mr5515292lfc.586.1607727957931; Fri, 11 Dec 2020 15:05:57 -0800 (PST) MIME-Version: 1.0 References: <20201211094138.2863677-1-nobuhiro1.iwamatsu@toshiba.co.jp> <20201211094138.2863677-2-nobuhiro1.iwamatsu@toshiba.co.jp> In-Reply-To: <20201211094138.2863677-2-nobuhiro1.iwamatsu@toshiba.co.jp> From: Linus Walleij Date: Sat, 12 Dec 2020 00:05:47 +0100 Message-ID: Subject: Re: [PATCH v4 1/4] dt-bindings: gpio: Add bindings for Toshiba Visconti GPIO Controller To: Nobuhiro Iwamatsu , Marc Zyngier X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201211_180600_036402_AFEFFAB4 X-CRM114-Status: UNSURE ( 9.50 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Punit Agrawal , Rob Herring , "linux-kernel@vger.kernel.org" , "open list:GPIO SUBSYSTEM" , Rob Herring , yuji2.ishikawa@toshiba.co.jp, Linux ARM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Looping in Marc here: On Fri, Dec 11, 2020 at 1:43 AM Nobuhiro Iwamatsu wrote: > Add bindings for the Toshiba Visconti GPIO Controller. > > Signed-off-by: Nobuhiro Iwamatsu > Reviewed-by: Rob Herring > Reviewed-by: Punit Agrawal (...) > + interrupts = , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; This is an hierarchical IRQ controller. (These IRQs are mapped 1-to-1 to IRQ lines.) I was under the impression that we don't encode interrupts into the GPIO controller like this when we have that. Instead, hardcode these into the driver. The compatible string gives away how the local offsets map to the GIC IRQs. Add no interrupts to the node but make sure that the GIC is the parent. (Should be default.) Compare e.g. Documentation/devicetree/bindings/gpio/intel,ixp4xx-gpio.txt Which has a similar "some hierarchical IRQs" setup. Yours, Linus Walleij _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel