* [PATCH] pinctrl: sunxi: a83t: Fix NAND function name for some pins
@ 2022-05-26 2:49 ` Samuel Holland
0 siblings, 0 replies; 6+ messages in thread
From: Samuel Holland @ 2022-05-26 2:49 UTC (permalink / raw)
To: Chen-Yu Tsai, Jernej Skrabec
Cc: Samuel Holland, Linus Walleij, Maxime Ripard, Vishnu Patekar,
linux-arm-kernel, linux-gpio, linux-kernel, linux-sunxi
The other NAND pins on Port C use the "nand0" function name.
"nand0" also matches all of the other Allwinner SoCs.
Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller support")
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
index 4ada80317a3b..b5c1a8f363f3 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
@@ -158,26 +158,26 @@ static const struct sunxi_desc_pin sun8i_a83t_pins[] = {
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
- SUNXI_FUNCTION(0x2, "nand"), /* DQ6 */
+ SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
- SUNXI_FUNCTION(0x2, "nand"), /* DQ7 */
+ SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
- SUNXI_FUNCTION(0x2, "nand"), /* DQS */
+ SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
SUNXI_FUNCTION(0x3, "mmc2")), /* RST */
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
- SUNXI_FUNCTION(0x2, "nand")), /* CE2 */
+ SUNXI_FUNCTION(0x2, "nand0")), /* CE2 */
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
- SUNXI_FUNCTION(0x2, "nand")), /* CE3 */
+ SUNXI_FUNCTION(0x2, "nand0")), /* CE3 */
/* Hole */
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
SUNXI_FUNCTION(0x0, "gpio_in"),
--
2.35.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH] pinctrl: sunxi: a83t: Fix NAND function name for some pins
@ 2022-05-26 2:49 ` Samuel Holland
0 siblings, 0 replies; 6+ messages in thread
From: Samuel Holland @ 2022-05-26 2:49 UTC (permalink / raw)
To: Chen-Yu Tsai, Jernej Skrabec
Cc: Samuel Holland, Linus Walleij, Maxime Ripard, Vishnu Patekar,
linux-arm-kernel, linux-gpio, linux-kernel, linux-sunxi
The other NAND pins on Port C use the "nand0" function name.
"nand0" also matches all of the other Allwinner SoCs.
Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller support")
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
index 4ada80317a3b..b5c1a8f363f3 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
@@ -158,26 +158,26 @@ static const struct sunxi_desc_pin sun8i_a83t_pins[] = {
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
- SUNXI_FUNCTION(0x2, "nand"), /* DQ6 */
+ SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
- SUNXI_FUNCTION(0x2, "nand"), /* DQ7 */
+ SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
- SUNXI_FUNCTION(0x2, "nand"), /* DQS */
+ SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
SUNXI_FUNCTION(0x3, "mmc2")), /* RST */
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
- SUNXI_FUNCTION(0x2, "nand")), /* CE2 */
+ SUNXI_FUNCTION(0x2, "nand0")), /* CE2 */
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
- SUNXI_FUNCTION(0x2, "nand")), /* CE3 */
+ SUNXI_FUNCTION(0x2, "nand0")), /* CE3 */
/* Hole */
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
SUNXI_FUNCTION(0x0, "gpio_in"),
--
2.35.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] pinctrl: sunxi: a83t: Fix NAND function name for some pins
2022-05-26 2:49 ` Samuel Holland
@ 2022-05-26 20:49 ` Jernej Škrabec
-1 siblings, 0 replies; 6+ messages in thread
From: Jernej Škrabec @ 2022-05-26 20:49 UTC (permalink / raw)
To: Chen-Yu Tsai, Samuel Holland
Cc: Samuel Holland, Linus Walleij, Maxime Ripard, Vishnu Patekar,
linux-arm-kernel, linux-gpio, linux-kernel, linux-sunxi
Dne četrtek, 26. maj 2022 ob 04:49:56 CEST je Samuel Holland napisal(a):
> The other NAND pins on Port C use the "nand0" function name.
> "nand0" also matches all of the other Allwinner SoCs.
>
> Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller
support")
> Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Best regards,
Jernej
> ---
>
> drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/
sunxi/pinctrl-sun8i-a83t.c
> index 4ada80317a3b..b5c1a8f363f3 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
> @@ -158,26 +158,26 @@ static const struct sunxi_desc_pin sun8i_a83t_pins[] =
{
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand"), /* DQ6
*/
> + SUNXI_FUNCTION(0x2, "nand0"), /* DQ6
*/
> SUNXI_FUNCTION(0x3, "mmc2")), /* D6
*/
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand"), /* DQ7
*/
> + SUNXI_FUNCTION(0x2, "nand0"), /* DQ7
*/
> SUNXI_FUNCTION(0x3, "mmc2")), /* D7
*/
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand"), /* DQS
*/
> + SUNXI_FUNCTION(0x2, "nand0"), /* DQS
*/
> SUNXI_FUNCTION(0x3, "mmc2")), /* RST
*/
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand")), /* CE2
*/
> + SUNXI_FUNCTION(0x2, "nand0")), /* CE2 */
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand")), /* CE3
*/
> + SUNXI_FUNCTION(0x2, "nand0")), /* CE3 */
> /* Hole */
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> --
> 2.35.1
>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] pinctrl: sunxi: a83t: Fix NAND function name for some pins
@ 2022-05-26 20:49 ` Jernej Škrabec
0 siblings, 0 replies; 6+ messages in thread
From: Jernej Škrabec @ 2022-05-26 20:49 UTC (permalink / raw)
To: Chen-Yu Tsai, Samuel Holland
Cc: Samuel Holland, Linus Walleij, Maxime Ripard, Vishnu Patekar,
linux-arm-kernel, linux-gpio, linux-kernel, linux-sunxi
Dne četrtek, 26. maj 2022 ob 04:49:56 CEST je Samuel Holland napisal(a):
> The other NAND pins on Port C use the "nand0" function name.
> "nand0" also matches all of the other Allwinner SoCs.
>
> Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller
support")
> Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Best regards,
Jernej
> ---
>
> drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/
sunxi/pinctrl-sun8i-a83t.c
> index 4ada80317a3b..b5c1a8f363f3 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
> @@ -158,26 +158,26 @@ static const struct sunxi_desc_pin sun8i_a83t_pins[] =
{
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand"), /* DQ6
*/
> + SUNXI_FUNCTION(0x2, "nand0"), /* DQ6
*/
> SUNXI_FUNCTION(0x3, "mmc2")), /* D6
*/
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand"), /* DQ7
*/
> + SUNXI_FUNCTION(0x2, "nand0"), /* DQ7
*/
> SUNXI_FUNCTION(0x3, "mmc2")), /* D7
*/
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand"), /* DQS
*/
> + SUNXI_FUNCTION(0x2, "nand0"), /* DQS
*/
> SUNXI_FUNCTION(0x3, "mmc2")), /* RST
*/
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand")), /* CE2
*/
> + SUNXI_FUNCTION(0x2, "nand0")), /* CE2 */
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand")), /* CE3
*/
> + SUNXI_FUNCTION(0x2, "nand0")), /* CE3 */
> /* Hole */
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> --
> 2.35.1
>
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] pinctrl: sunxi: a83t: Fix NAND function name for some pins
2022-05-26 2:49 ` Samuel Holland
@ 2022-06-03 22:22 ` Linus Walleij
-1 siblings, 0 replies; 6+ messages in thread
From: Linus Walleij @ 2022-06-03 22:22 UTC (permalink / raw)
To: Samuel Holland
Cc: Chen-Yu Tsai, Jernej Skrabec, Maxime Ripard, Vishnu Patekar,
linux-arm-kernel, linux-gpio, linux-kernel, linux-sunxi
On Thu, May 26, 2022 at 4:49 AM Samuel Holland <samuel@sholland.org> wrote:
> The other NAND pins on Port C use the "nand0" function name.
> "nand0" also matches all of the other Allwinner SoCs.
>
> Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller support")
> Signed-off-by: Samuel Holland <samuel@sholland.org>
Patch applied for fixes.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] pinctrl: sunxi: a83t: Fix NAND function name for some pins
@ 2022-06-03 22:22 ` Linus Walleij
0 siblings, 0 replies; 6+ messages in thread
From: Linus Walleij @ 2022-06-03 22:22 UTC (permalink / raw)
To: Samuel Holland
Cc: Chen-Yu Tsai, Jernej Skrabec, Maxime Ripard, Vishnu Patekar,
linux-arm-kernel, linux-gpio, linux-kernel, linux-sunxi
On Thu, May 26, 2022 at 4:49 AM Samuel Holland <samuel@sholland.org> wrote:
> The other NAND pins on Port C use the "nand0" function name.
> "nand0" also matches all of the other Allwinner SoCs.
>
> Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller support")
> Signed-off-by: Samuel Holland <samuel@sholland.org>
Patch applied for fixes.
Yours,
Linus Walleij
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-06-03 22:23 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-26 2:49 [PATCH] pinctrl: sunxi: a83t: Fix NAND function name for some pins Samuel Holland
2022-05-26 2:49 ` Samuel Holland
2022-05-26 20:49 ` Jernej Škrabec
2022-05-26 20:49 ` Jernej Škrabec
2022-06-03 22:22 ` Linus Walleij
2022-06-03 22:22 ` Linus Walleij
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