From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43431) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YDVWR-0008CX-R7 for qemu-devel@nongnu.org; Tue, 20 Jan 2015 04:54:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YDVWN-0004ri-Qp for qemu-devel@nongnu.org; Tue, 20 Jan 2015 04:54:55 -0500 MIME-Version: 1.0 In-Reply-To: <54BD631C.8070409@suse.de> References: <1421667328-11800-1-git-send-email-mark.cave-ayland@ilande.co.uk> <1421667328-11800-3-git-send-email-mark.cave-ayland@ilande.co.uk> <54BCFC57.3010709@redhat.com> <54BD1C2D.9070603@suse.de> <54BD631C.8070409@suse.de> From: Artyom Tarasenko Date: Tue, 20 Jan 2015 10:54:30 +0100 Message-ID: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 2/2] m48t59: add mem_base value to m48t59_init_isa() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Andreas_F=C3=A4rber?= Cc: Mark Cave-Ayland , qemu-devel , Alexander Graf , qemu-ppc@nongnu.org, Paolo Bonzini , =?UTF-8?Q?Herv=C3=A9_Poussineau?= On Mon, Jan 19, 2015 at 9:03 PM, Andreas F=C3=A4rber wro= te: > Am 19.01.2015 um 16:22 schrieb Artyom Tarasenko: >> On Mon, Jan 19, 2015 at 4:01 PM, Andreas F=C3=A4rber = wrote: >>> Am 19.01.2015 um 13:57 schrieb Artyom Tarasenko: >>>> On Mon, Jan 19, 2015 at 1:45 PM, Paolo Bonzini w= rote: >>>>> On 19/01/2015 12:35, Mark Cave-Ayland wrote: >>>>>> Similar to m48t59_init(), add a mem_base value so that NVRAM can be = mapped via >>>>>> MMIO rather than ioport if required. >>>>>> >>>>>> Signed-off-by: Mark Cave-Ayland >>>>>> --- >>>>> >>>>> Is it really ISA if it's MMIO? In other words, why can't this be a >>>>> sysbus device? >>>> >>>> On physical machines it's EBus, which is pretty much like 8-bit ISA. >>>> So, I think modelling it as ISA is closer to to the reality. >>>> But out of curiosity, would it be possible to have a sysbus device >>>> somewhere in a middle of PCI space? [...] >>> >>> Why would you want to use a SysBusDevice in the first place? >> >> Ask Paolo. :-) For me it's only important to have a MMIO device in the >> proper address range. >> >>> I previously discussed with Mark that it should be an EBusDevice, not a= n >>> ISADevice or SysBusDevice. >> >> Interesting. I can't find this discussion in the list archive. > > Hm, am I mixing that up with SBus then? There were some helper functions > related to ROM loading being added as context to my suggestion that I > thought could become class fields. Yes, for SBus it totally makes sense. >> Do you suggest to >> create EBusDevices for all ISA devices (serial, parallel, keyboard, >> floppy) used in sun4u, or only for m48t59? >> What would be the advantage of using EBusDevice over ISADevice? > > For all devices that are in fact EBus devices. The general idea is > encapsulation and abstraction - hiding the implementation detail of > whether it is internally an ISADevice or something else. Such a patch > should be quite trivial. Similarly it gives helper functions and > potential class methods a natural place to live. Yes, the patch is trivial. But EBus is nothing else but an ISA bus with 8 data lines. To me it looks like the bus width is an implementation detail we can hide. (It's not documented what should happen if an EBus device is accessed with a non 8-bit width. I tried 16 bit access on a physical machine and it seemed to work). Currently we can just use all the ISA devices unmodified if we like. With EBus we would only be able to use a subset of ISA devices, no? Artyom --=20 Regards, Artyom Tarasenko SPARC and PPC PReP under qemu blog: http://tyom.blogspot.com/search/label/q= emu