From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91A87C2BB41 for ; Tue, 16 Aug 2022 12:43:46 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3DF2F83F37; Tue, 16 Aug 2022 14:43:44 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="Gq72arS4"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id A5601848D7; Tue, 16 Aug 2022 14:43:42 +0200 (CEST) Received: from mail-yw1-x1131.google.com (mail-yw1-x1131.google.com [IPv6:2607:f8b0:4864:20::1131]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id D99FF8191C for ; Tue, 16 Aug 2022 14:43:38 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ilias.apalodimas@linaro.org Received: by mail-yw1-x1131.google.com with SMTP id 00721157ae682-33387bf0c4aso42093277b3.11 for ; Tue, 16 Aug 2022 05:43:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc; bh=faWu550TXRIQZWMRjDjQYvv/BLoE9vP30R59ytmYWCo=; b=Gq72arS4o5iCHpLA0SCVH5GMuzxs1KXjYxcQLxD995zbFEg1iLvXWK5ET2hSyer3H5 sy9D5W6AZ725PobaQFPoOFkf1ETw2h8LDEJucm1EJvcDXxo/CjRdmrOO4Gb0z/VOKYA7 RysPjnQzn5ODmdbs8rfDy4ETdb0MMEp5REiDfuCmDAXVkfH3AwnjWvj8FLaM0J52M/xQ oPRUwPEyVFQ95ePZi2wQQNW+KaeSTvBVpf17bG/+CqNcbpw1yFqp3Q3xcC5ufeWET19W gzAlD8AKZ9jaKkXP3bUDM8aD1A8oZdb/QzAisxh1WRcQ+zph3OkwFbA/NZxNJ7a/BR7e 957Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc; bh=faWu550TXRIQZWMRjDjQYvv/BLoE9vP30R59ytmYWCo=; b=ucE/dDM/aIT56miea6johwdEebyjUrUeAQyaDX8t+pyqjXYd6IJSJzkUnPePf3+bXP Vm2+T9nwJdkFLcmJlkMGMLnENsEQ27NOVMrZ0AuaFI3aWlI05O+fRlgAsWBRz3Pk3n1F RFdaIbWoiV1GYIl3hWCOfFF6K0jAnZoOZuEA+SHyrDFzejE3JEadEeGNbSLRJK44K47v LwBaaugpotHhmXBQChIgW3K5jV0N4bPrt7HcebaDFA6B5u+TosGE5A4ZG44G07bNYKfT M9cJ20hlKaijuhzfwVFImnnXNCkX986DSgzb96aBwo9s9u9H3qFvAjpWDbYRXqZT58He NTog== X-Gm-Message-State: ACgBeo2Alq582wgJL3Q8TvrRfu8svR0KI3zUscIhiRWceBYgTUe1PpHH q6zD5TSg2/+Lf+DM/G6zZ5TJgw9ZbUTUfkNOZ6Xh3w== X-Google-Smtp-Source: AA6agR6Tkf1eBeTa9H3/+LHv+RJxOwrmW9QcJ9j8NP3pIwq+cofdgyZ1HZyxq19f8P/20p3N2qyZxDNXCiDP6avF4lw= X-Received: by 2002:a25:7108:0:b0:67a:3d6c:2196 with SMTP id m8-20020a257108000000b0067a3d6c2196mr14117655ybc.60.1660653817527; Tue, 16 Aug 2022 05:43:37 -0700 (PDT) MIME-Version: 1.0 References: <20220813195639.1824765-1-sjg@chromium.org> <20220813195639.1824765-7-sjg@chromium.org> In-Reply-To: <20220813195639.1824765-7-sjg@chromium.org> From: Ilias Apalodimas Date: Tue, 16 Aug 2022 15:43:01 +0300 Message-ID: Subject: Re: [PATCH v2 6/7] tpm: Implement state command for Cr50 To: Simon Glass Cc: U-Boot Mailing List , Heinrich Schuchardt , Masahisa Kojima , Ruchika Gupta Content-Type: text/plain; charset="UTF-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Hi Simon, I know little of this device and the whole patch seems fine apart from the definitions and declarations of the state functions. On Sat, 13 Aug 2022 at 22:56, Simon Glass wrote: > > > drivers/tpm/cr50_i2c.c | 117 +++++++++++++++++++++++++++++++++++++++++ > include/tpm-v2.h | 54 +++++++++++++++++++ > lib/tpm-v2.c | 24 +++++++++ [...] > diff --git a/include/tpm-v2.h b/include/tpm-v2.h > index e79c90b9395..8e90a616220 100644 > --- a/include/tpm-v2.h > +++ b/include/tpm-v2.h > @@ -419,6 +419,50 @@ enum { > HR_NV_INDEX = TPM_HT_NV_INDEX << HR_SHIFT, > }; > > +/* > + * Operations specific to the Cr50 TPM used on Chromium OS and Android devices > + * > + * FIXME: below is not enough to differentiate between vendors commands > + * of numerous devices. However, the current tpm2 APIs aren't very amenable > + * to extending generically because the marshaling code is assuming all > + * knowledge of all commands. > + */ > +#define TPM2_CC_VENDOR_BIT_MASK 0x20000000 > + > +#define TPM2_CR50_VENDOR_COMMAND (TPM2_CC_VENDOR_BIT_MASK | 0) > +#define TPM2_CR50_SUB_CMD_IMMEDIATE_RESET 19 > +#define TPM2_CR50_SUB_CMD_NVMEM_ENABLE_COMMITS 21 > +#define TPM2_CR50_SUB_CMD_REPORT_TPM_STATE 23 > +#define TPM2_CR50_SUB_CMD_TURN_UPDATE_ON 24 > +#define TPM2_CR50_SUB_CMD_GET_REC_BTN 29 > +#define TPM2_CR50_SUB_CMD_TPM_MODE 40 > +#define TPM2_CR50_SUB_CMD_GET_BOOT_MODE 52 > +#define TPM2_CR50_SUB_CMD_RESET_EC 53 > + > +/* Cr50 vendor-specific error codes. */ > +#define VENDOR_RC_ERR 0x00000500 > +enum cr50_vendor_rc { > + VENDOR_RC_INTERNAL_ERROR = (VENDOR_RC_ERR | 6), > + VENDOR_RC_NO_SUCH_SUBCOMMAND = (VENDOR_RC_ERR | 8), > + VENDOR_RC_NO_SUCH_COMMAND = (VENDOR_RC_ERR | 127), > +}; > + > +enum cr50_tpm_mode { > + /* > + * Default state: TPM is enabled, and may be set to either > + * TPM_MODE_ENABLED or TPM_MODE_DISABLED. > + */ > + TPM_MODE_ENABLED_TENTATIVE = 0, > + > + /* TPM is enabled, and mode may not be changed. */ > + TPM_MODE_ENABLED = 1, > + > + /* TPM is disabled, and mode may not be changed. */ > + TPM_MODE_DISABLED = 2, > + > + TPM_MODE_INVALID, > +}; > + > /** > * Issue a TPM2_Startup command. > * > @@ -658,4 +702,14 @@ u32 tpm2_disable_platform_hierarchy(struct udevice *dev); > u32 tpm2_submit_command(struct udevice *dev, const u8 *sendbuf, > u8 *recvbuf, size_t *recv_size); > > +/** > + * tpm_cr50_report_state() - Report the Cr50 internal state > + * > + * @dev: TPM device > + * @recvbuf: Buffer to save the response to > + * @recv_size: Pointer to the size of the response buffer > + * Return: result of the operation > + */ > +u32 tpm2_cr50_report_state(struct udevice *dev, u8 *recvbuf, size_t *recv_size); > + I think we should keep the generic include files clean for hardware specific details. > #endif /* __TPM_V2_H */ > diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c > index 3e240bb4c67..3de4841974a 100644 > --- a/lib/tpm-v2.c > +++ b/lib/tpm-v2.c > @@ -679,3 +679,27 @@ u32 tpm2_submit_command(struct udevice *dev, const u8 *sendbuf, > { > return tpm_sendrecv_command(dev, sendbuf, recvbuf, recv_size); > } > + > +u32 tpm2_cr50_report_state(struct udevice *dev, u8 *recvbuf, size_t *recv_size) > +{ > + u8 command_v2[COMMAND_BUFFER_SIZE] = { > + /* header 10 bytes */ > + tpm_u16(TPM2_ST_NO_SESSIONS), /* TAG */ > + tpm_u32(10 + 2), /* Length */ > + tpm_u32(TPM2_CR50_VENDOR_COMMAND), /* Command code */ > + > + tpm_u16(TPM2_CR50_SUB_CMD_REPORT_TPM_STATE), > + }; > + int ret; > + > + ret = tpm_sendrecv_command(dev, command_v2, recvbuf, recv_size); > + log_debug("ret=%s, %x\n", dev->name, ret); > + if (ret) > + return ret; > + if (*recv_size < 12) > + return -ENODATA; > + *recv_size -= 12; > + memcpy(recvbuf, recvbuf + 12, *recv_size); > + > + return 0; > +} Same here, this functions seems ok but shouldn't land in the generic TPM API Thanks /Ilias > -- > 2.37.1.595.g718a3a8f04-goog >