From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752757AbdCBTTg (ORCPT ); Thu, 2 Mar 2017 14:19:36 -0500 Received: from mail-ot0-f195.google.com ([74.125.82.195]:36647 "EHLO mail-ot0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752209AbdCBTTa (ORCPT ); Thu, 2 Mar 2017 14:19:30 -0500 MIME-Version: 1.0 In-Reply-To: References: <1488313886-17155-1-git-send-email-jon.mason@broadcom.com> <1488313886-17155-2-git-send-email-jon.mason@broadcom.com> From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= Date: Thu, 2 Mar 2017 20:19:26 +0100 Message-ID: Subject: Re: [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT To: Jon Mason Cc: Hauke Mehrtens , Rob Herring , Mark Rutland , Florian Fainelli , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-arm-kernel , open list , BCM Kernel Feedback , Jon Mason Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id v22JJejj012866 On 2 March 2017 at 20:00, Jon Mason wrote: > On Thu, Mar 2, 2017 at 1:54 PM, Rafał Miłecki wrote: >> >> On 02/28/2017 09:31 PM, Jon Mason wrote: >>> >>> From: Jon Mason >>> >>> Add support for the ARM TWD Watchdog to the bcm5301x device tree. The >>> ARM TWD timer allocated the register space for the WDT, so this patch >>> necessitated shrinking that. Also, the GIC masks were added for these. >>> >>> Signed-off-by: Jon Mason >>> --- >>> arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++--- >>> 1 file changed, 12 insertions(+), 3 deletions(-) >>> >>> diff --git a/arch/arm/boot/dts/bcm5301x.dtsi >>> b/arch/arm/boot/dts/bcm5301x.dtsi >>> index 4fbb089..3fbc450 100644 >>> --- a/arch/arm/boot/dts/bcm5301x.dtsi >>> +++ b/arch/arm/boot/dts/bcm5301x.dtsi >>> @@ -70,10 +70,19 @@ >>> clocks = <&periph_clk>; >>> }; >>> >>> - local-timer@20600 { >>> + timer@20600 { >>> compatible = "arm,cortex-a9-twd-timer"; >>> - reg = <0x20600 0x100>; >>> - interrupts = ; >>> + reg = <0x20600 0x20>; >>> + interrupts = >> | >>> + IRQ_TYPE_LEVEL_HIGH)>; >>> + clocks = <&periph_clk>; >>> + }; >> >> >> If you follow my recent e-mail thread: >> BCM5301X: GIC: PPI11 is secure or misconfigured (same for PPI13) >> you'll see IRQ_TYPE_LEVEL_HIGH type isn't correct. It should be >> IRQ_TYPE_EDGE_RISING. >> >> I believe patch switching to IRQ_TYPE_EDGE_RISING should be sent with Cc >> stable >> for kernels 4.8+. >> >> The same change is needed for "arm,cortex-a9-global-timer". >> >> Would you find time to revise this patch? > > > I'll do 2 patches. One to revise this one and one to address the issue > you've discovered. Will that be okay for you? Sure. Please make sure you switch to IRQ_TYPE_EDGE_RISING before doing other changes, so it can be applied cleanly to the stable kernels. -- Rafał From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= Subject: Re: [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT Date: Thu, 2 Mar 2017 20:19:26 +0100 Message-ID: References: <1488313886-17155-1-git-send-email-jon.mason@broadcom.com> <1488313886-17155-2-git-send-email-jon.mason@broadcom.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Jon Mason Cc: Hauke Mehrtens , Rob Herring , Mark Rutland , Florian Fainelli , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-arm-kernel , open list , BCM Kernel Feedback , Jon Mason List-Id: devicetree@vger.kernel.org On 2 March 2017 at 20:00, Jon Mason wrote: > On Thu, Mar 2, 2017 at 1:54 PM, Rafa=C5=82 Mi=C5=82ecki wrote: >> >> On 02/28/2017 09:31 PM, Jon Mason wrote: >>> >>> From: Jon Mason >>> >>> Add support for the ARM TWD Watchdog to the bcm5301x device tree. The >>> ARM TWD timer allocated the register space for the WDT, so this patch >>> necessitated shrinking that. Also, the GIC masks were added for these. >>> >>> Signed-off-by: Jon Mason >>> --- >>> arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++--- >>> 1 file changed, 12 insertions(+), 3 deletions(-) >>> >>> diff --git a/arch/arm/boot/dts/bcm5301x.dtsi >>> b/arch/arm/boot/dts/bcm5301x.dtsi >>> index 4fbb089..3fbc450 100644 >>> --- a/arch/arm/boot/dts/bcm5301x.dtsi >>> +++ b/arch/arm/boot/dts/bcm5301x.dtsi >>> @@ -70,10 +70,19 @@ >>> clocks =3D <&periph_clk>; >>> }; >>> >>> - local-timer@20600 { >>> + timer@20600 { >>> compatible =3D "arm,cortex-a9-twd-timer"; >>> - reg =3D <0x20600 0x100>; >>> - interrupts =3D = ; >>> + reg =3D <0x20600 0x20>; >>> + interrupts =3D >> | >>> + IRQ_TYPE_LEVEL_HIGH)>= ; >>> + clocks =3D <&periph_clk>; >>> + }; >> >> >> If you follow my recent e-mail thread: >> BCM5301X: GIC: PPI11 is secure or misconfigured (same for PPI13) >> you'll see IRQ_TYPE_LEVEL_HIGH type isn't correct. It should be >> IRQ_TYPE_EDGE_RISING. >> >> I believe patch switching to IRQ_TYPE_EDGE_RISING should be sent with Cc >> stable >> for kernels 4.8+. >> >> The same change is needed for "arm,cortex-a9-global-timer". >> >> Would you find time to revise this patch? > > > I'll do 2 patches. One to revise this one and one to address the issue > you've discovered. Will that be okay for you? Sure. Please make sure you switch to IRQ_TYPE_EDGE_RISING before doing other changes, so it can be applied cleanly to the stable kernels. --=20 Rafa=C5=82 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: zajec5@gmail.com (=?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?=) Date: Thu, 2 Mar 2017 20:19:26 +0100 Subject: [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT In-Reply-To: References: <1488313886-17155-1-git-send-email-jon.mason@broadcom.com> <1488313886-17155-2-git-send-email-jon.mason@broadcom.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2 March 2017 at 20:00, Jon Mason wrote: > On Thu, Mar 2, 2017 at 1:54 PM, Rafa? Mi?ecki wrote: >> >> On 02/28/2017 09:31 PM, Jon Mason wrote: >>> >>> From: Jon Mason >>> >>> Add support for the ARM TWD Watchdog to the bcm5301x device tree. The >>> ARM TWD timer allocated the register space for the WDT, so this patch >>> necessitated shrinking that. Also, the GIC masks were added for these. >>> >>> Signed-off-by: Jon Mason >>> --- >>> arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++--- >>> 1 file changed, 12 insertions(+), 3 deletions(-) >>> >>> diff --git a/arch/arm/boot/dts/bcm5301x.dtsi >>> b/arch/arm/boot/dts/bcm5301x.dtsi >>> index 4fbb089..3fbc450 100644 >>> --- a/arch/arm/boot/dts/bcm5301x.dtsi >>> +++ b/arch/arm/boot/dts/bcm5301x.dtsi >>> @@ -70,10 +70,19 @@ >>> clocks = <&periph_clk>; >>> }; >>> >>> - local-timer at 20600 { >>> + timer at 20600 { >>> compatible = "arm,cortex-a9-twd-timer"; >>> - reg = <0x20600 0x100>; >>> - interrupts = ; >>> + reg = <0x20600 0x20>; >>> + interrupts = >> | >>> + IRQ_TYPE_LEVEL_HIGH)>; >>> + clocks = <&periph_clk>; >>> + }; >> >> >> If you follow my recent e-mail thread: >> BCM5301X: GIC: PPI11 is secure or misconfigured (same for PPI13) >> you'll see IRQ_TYPE_LEVEL_HIGH type isn't correct. It should be >> IRQ_TYPE_EDGE_RISING. >> >> I believe patch switching to IRQ_TYPE_EDGE_RISING should be sent with Cc >> stable >> for kernels 4.8+. >> >> The same change is needed for "arm,cortex-a9-global-timer". >> >> Would you find time to revise this patch? > > > I'll do 2 patches. One to revise this one and one to address the issue > you've discovered. Will that be okay for you? Sure. Please make sure you switch to IRQ_TYPE_EDGE_RISING before doing other changes, so it can be applied cleanly to the stable kernels. -- Rafa?