From: Jagan Teki <jagan@openedev.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 02/11] sunxi: add gtbus-initialisation for sun9i
Date: Sat, 29 Oct 2016 00:15:44 +0530 [thread overview]
Message-ID: <CAD6G_RQp=mFW6EJzprDhuU72siUwx-UZbmufyRx_i+JR7MYLMA@mail.gmail.com> (raw)
In-Reply-To: <20161028102138.8678-3-wens@csie.org>
On Fri, Oct 28, 2016 at 3:51 PM, Chen-Yu Tsai <wens@csie.org> wrote:
> From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>
> On sun9i, the GTBUS manages transaction priority and bandwidth
> for multiple read ports when accessing DRAM. The initialisation
> mirrors the settings from Allwinner's boot0 for now, even though
> this may not be optimal for all applications (e.g. headless
> systems might want to give priority to IO modules).
>
> Adding a common callout to gtbus_init() from the SPL clock init
> with a weakly defined implementation in sunxi/clock.c to fallback
> to for platforms that don't require this.
>
> [wens at csie.org: Moved gtbus_sun9i.c to arch/arm/mach-sunxi/; style cleanup]
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
> arch/arm/include/asm/arch-sunxi/cpu_sun9i.h | 2 +
> arch/arm/include/asm/arch-sunxi/gtbus.h | 21 +++++++
> arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h | 89 +++++++++++++++++++++++++++
> arch/arm/mach-sunxi/Makefile | 1 +
> arch/arm/mach-sunxi/clock.c | 6 ++
> arch/arm/mach-sunxi/gtbus_sun9i.c | 48 +++++++++++++++
> 6 files changed, 167 insertions(+)
> create mode 100644 arch/arm/include/asm/arch-sunxi/gtbus.h
> create mode 100644 arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h
> create mode 100644 arch/arm/mach-sunxi/gtbus_sun9i.c
>
> diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
> index acbc94f4c3b8..ba18a0f551ad 100644
> --- a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
> +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
> @@ -23,6 +23,8 @@
> #define SUNXI_NFC_BASE (REGS_AHB0_BASE + 0x3000)
> #define SUNXI_TSC_BASE (REGS_AHB0_BASE + 0x4000)
>
> +#define SUNXI_GTBUS_BASE (REGS_AHB0_BASE + 0x9000)
> +
> #define SUNXI_MMC0_BASE (REGS_AHB0_BASE + 0x0f000)
> #define SUNXI_MMC1_BASE (REGS_AHB0_BASE + 0x10000)
> #define SUNXI_MMC2_BASE (REGS_AHB0_BASE + 0x11000)
> diff --git a/arch/arm/include/asm/arch-sunxi/gtbus.h b/arch/arm/include/asm/arch-sunxi/gtbus.h
> new file mode 100644
> index 000000000000..b8308d513545
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-sunxi/gtbus.h
> @@ -0,0 +1,21 @@
> +/*
> + * GTBUS initialisation
> + *
> + * (C) Copyright 2016 Theobroma Systems Design und Consulting GmbH
> + * Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef _SUNXI_GTBUS_H
> +#define _SUNXI_GTBUS_H
> +
> +#if defined(CONFIG_MACH_SUN9I)
> +#include <asm/arch/gtbus_sun9i.h>
> +#endif
> +
> +#ifndef __ASSEMBLY__
> +void gtbus_init(void);
> +#endif
> +
> +#endif
> diff --git a/arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h b/arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h
> new file mode 100644
> index 000000000000..91bc2bdb5103
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h
> @@ -0,0 +1,89 @@
> +/*
> + * GTBUS initialisation for sun9i
> + *
> + * (C) Copyright 2016 Theobroma Systems Design und Consulting GmbH
> + * Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef _SUNXI_GTBUS_SUN9I_H
> +#define _SUNXI_GTBUS_SUN9I_H
> +
> +#include <linux/types.h>
> +
> +struct sunxi_gtbus_reg {
> + u32 mst_cfg[36]; /* 0x000 */
> + u8 reserved1[0x70]; /* 0x090 */
> + u32 bw_wdw_cfg; /* 0x100 */
> + u32 mst_read_prio_cfg[2]; /* 0x104 */
> + u32 lvl2_mst_cfg; /* 0x10c */
> + u32 sw_clk_on; /* 0x110 */
> + u32 sw_clk_off; /* 0x114 */
> + u32 pmu_mst_en; /* 0x118 */
> + u32 pmu_cfg; /* 0x11c */
> + u32 pmu_cnt[19]; /* 0x120 */
> + u32 reserved2[0x94]; /* 0x16c */
> + u32 cci400_config[3]; /* 0x200 */
> + u32 cci400_status[2]; /* 0x20c */
> +};
> +
> +/* for register GT_MST_CFG_REG(n) */
> +#define GT_ENABLE_REQ (1<<31) /* clock on */
> +#define GT_DISABLE_REQ (1<<30) /* clock off */
> +#define GT_QOS_SHIFT 28
> +#define GT_THD1_SHIFT 16
> +#define GT_REQN_MAX 0xf /* max number master requests in one cycle */
> +#define GT_REQN_SHIFT 12
> +#define GT_THD0_SHIFT 0
> +
> +#define GT_QOS_MAX 0x3
> +#define GT_THD_MAX 0xfff
> +#define GT_BW_WDW_MAX 0xffff
> +
> +/* mst_read_prio_cfg */
> +#define GT_PRIO_LOW 0
> +#define GT_PRIO_HIGH 1
> +
> +/* GTBUS port ids */
> +#define GT_PORT_CPUM1 0
> +#define GT_PORT_CPUM2 1
> +#define GT_PORT_SATA 2
> +#define GT_PORT_USB3 3
> +#define GT_PORT_FE0 4
> +#define GT_PORT_BE1 5
> +#define GT_PORT_BE2 6
> +#define GT_PORT_IEP0 7
> +#define GT_PORT_FE1 8
> +#define GT_PORT_BE0 9
> +#define GT_PORT_FE2 10
> +#define GT_PORT_IEP1 11
> +#define GT_PORT_VED 12
> +#define GT_PORT_VEE 13
> +#define GT_PORT_FD 14
> +#define GT_PORT_CSI 15
> +#define GT_PORT_MP 16
> +#define GT_PORT_HSI 17
> +#define GT_PORT_SS 18
> +#define GT_PORT_TS 19
> +#define GT_PORT_DMA 20
> +#define GT_PORT_NDFC0 21
> +#define GT_PORT_NDFC1 22
> +#define GT_PORT_CPUS 23
> +#define GT_PORT_TH 24
> +#define GT_PORT_GMAC 25
> +#define GT_PORT_USB0 26
> +#define GT_PORT_MSTG0 27
> +#define GT_PORT_MSTG1 28
> +#define GT_PORT_MSTG2 29
> +#define GT_PORT_MSTG3 30
> +#define GT_PORT_USB1 31
> +#define GT_PORT_GPU0 32
> +#define GT_PORT_GPU1 33
> +#define GT_PORT_USB2 34
> +#define GT_PORT_CPUM0 35
> +
> +#define GP_MST_CFG_DEFAULT ((GT_QOS_MAX << GT_QOS_SHIFT) | (GT_THD_MAX << GT_THD1_SHIFT) \
> + | (GT_REQN_MAX << GT_REQN_SHIFT) | (GT_THD_MAX << GT_THD0_SHIFT))
Please re-organize the macro, look confusing and crossed 80+line.
> +
> +#endif
> diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile
> index 9d07d6b84c1e..e7c7d8241d49 100644
> --- a/arch/arm/mach-sunxi/Makefile
> +++ b/arch/arm/mach-sunxi/Makefile
> @@ -33,6 +33,7 @@ else
> obj-$(CONFIG_MACH_SUN8I) += clock_sun6i.o
> endif
> obj-$(CONFIG_MACH_SUN9I) += clock_sun9i.o
> +obj-$(CONFIG_MACH_SUN9I) += gtbus_sun9i.o
Append to clock_sun9i
>
> obj-$(CONFIG_AXP152_POWER) += pmic_bus.o
> obj-$(CONFIG_AXP209_POWER) += pmic_bus.o
> diff --git a/arch/arm/mach-sunxi/clock.c b/arch/arm/mach-sunxi/clock.c
> index 0b8fc94711c8..e6f53f91e63a 100644
> --- a/arch/arm/mach-sunxi/clock.c
> +++ b/arch/arm/mach-sunxi/clock.c
> @@ -13,16 +13,22 @@
> #include <asm/arch/clock.h>
> #include <asm/arch/gpio.h>
> #include <asm/arch/prcm.h>
> +#include <asm/arch/gtbus.h>
> #include <asm/arch/sys_proto.h>
>
> __weak void clock_init_sec(void)
> {
> }
>
> +__weak void gtbus_init(void)
> +{
> +}
> +
> int clock_init(void)
> {
> #ifdef CONFIG_SPL_BUILD
> clock_init_safe();
> + gtbus_init();
Usually I recommend __weak in generic cases, so please call for 9I machines.
thanks!
--
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
next prev parent reply other threads:[~2016-10-28 18:45 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-28 10:21 [U-Boot] [PATCH 00/11] sunxi: Add full SPL support for sun9i (A80) Chen-Yu Tsai
2016-10-28 10:21 ` [U-Boot] [PATCH 01/11] sunxi: DRAM initialisation for sun9i Chen-Yu Tsai
2016-10-28 18:54 ` Jagan Teki
2016-10-29 10:39 ` Hans de Goede
2016-10-29 11:03 ` Chen-Yu Tsai
2016-10-28 10:21 ` [U-Boot] [PATCH 02/11] sunxi: add gtbus-initialisation " Chen-Yu Tsai
2016-10-28 18:45 ` Jagan Teki [this message]
2016-10-29 11:08 ` Chen-Yu Tsai
2016-10-29 11:57 ` Hans de Goede
2016-10-28 10:21 ` [U-Boot] [PATCH 03/11] sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Chen-Yu Tsai
2016-10-28 10:21 ` [U-Boot] [PATCH 04/11] sunxi: add initial clock setup for sun9i for SPL Chen-Yu Tsai
2016-10-28 10:21 ` [U-Boot] [PATCH 05/11] sunxi: enable SPL for sun9i Chen-Yu Tsai
2016-10-28 10:21 ` [U-Boot] [PATCH 06/11] sunxi: add MMC pinmux setup for SDC2 on sun9i Chen-Yu Tsai
2016-10-28 10:21 ` [U-Boot] [PATCH 07/11] sunxi: Set default CPU clock rate to 1008 MHz for sun9i (A80) Chen-Yu Tsai
2016-10-28 10:21 ` [U-Boot] [PATCH 08/11] sunxi: Add support for SID e-fuses on sun9i Chen-Yu Tsai
2016-10-28 10:21 ` [U-Boot] [PATCH 09/11] sunxi: Add default zq value for sun9i (A80) Chen-Yu Tsai
2016-10-28 10:21 ` [U-Boot] [PATCH 10/11] sunxi: Add support for A80 Optimus board Chen-Yu Tsai
2016-10-28 10:21 ` [U-Boot] [PATCH 11/11] sunxi: Add support for Cubieboard4 Chen-Yu Tsai
2016-10-28 17:30 ` [U-Boot] [PATCH 00/11] sunxi: Add full SPL support for sun9i (A80) Hans de Goede
2016-10-29 1:16 ` Chen-Yu Tsai
2016-10-29 12:12 ` Hans de Goede
2016-10-29 12:06 ` Hans de Goede
2016-10-30 5:30 ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2016-10-30 8:15 ` Hans de Goede
2016-11-02 1:39 ` Chen-Yu Tsai
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAD6G_RQp=mFW6EJzprDhuU72siUwx-UZbmufyRx_i+JR7MYLMA@mail.gmail.com' \
--to=jagan@openedev.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.