From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jagan Teki <jagannadh.teki@gmail.com>
Date: Mon, 25 Sep 2017 15:39:26 +0530
Subject: [U-Boot] [PATCH] sf: bar: Clean BA24 Bank Address Register bit
 after read/write/erase operation
In-Reply-To: <1505295574-14294-1-git-send-email-lukma@denx.de>
References: <1505295574-14294-1-git-send-email-lukma@denx.de>
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On Wed, Sep 13, 2017 at 3:09 PM, Lukasz Majewski <lukma@denx.de> wrote:
> The content of Bank Address Register (BAR) is volatile. It is cleared
> after power cycle or reset command (RESET F0h).
>
> Some memories (like e.g. s25fl256s) use it to access memory larger than
> 0x1000000 (16 MiB).
>
> The problem shows up when one:
>
> 1. Reads/writes/erases memory > 16 MiB
> 2. Calls "reset" u-boot command (which is not causing BAR to be cleared)
>
> In the above scenario, the SoC ROM sends 0x000000 address to read SPL.
> Unfortunately, the BA24 bit is still set and hence it receives content
> from 0x1000000 memory address.
> As a result the SoC aborts and we hang. Only power cycle can take the
> SoC out of this state.
>
> How to reproduce/test:
>
> sf probe; sf erase 0x1200000 0x800000; reset
> sf probe; sf erase 0x1200000 0x800000; sf write 0x11000000 0x1200000 0x800000; reset
> sf probe; sf read 0x11000000 0x1200000 0x800000; reset
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> ---
>  drivers/mtd/spi/spi_flash.c | 33 +++++++++++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
>
> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
> index 34f6888..d19d64a 100644
> --- a/drivers/mtd/spi/spi_flash.c
> +++ b/drivers/mtd/spi/spi_flash.c
> @@ -113,6 +113,27 @@ static int write_cr(struct spi_flash *flash, u8 wc)
>  #endif
>
>  #ifdef CONFIG_SPI_FLASH_BAR
> +/*
> + * This "cleanup" is necessary in a situation when one was accessing
> + * spi flash memory > 16 MiB by using Bank Address Register's BA24 bit.
> + *
> + * After it the BA24 bit shall be cleared to allow access to correct
> + * memory region after SW reset (by calling "reset" command).
> + *
> + * Otherwise, the BA24 bit may be left set and then after reset, the
> + * ROM would seek for SPL from 0x1000000, not 0x0.

This need to change, SPL will look 16 MiB * bank_sel

> + */
> +static int cleanup_bar(struct spi_flash *flash)

what about clear_bar?

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.