From: Praveen Paneri <paneri@gmail.com>
To: Praveen Paneri <praveen.paneri@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3] drm/i915: enable WaDisableDopClkGating for skl
Date: Thu, 3 Aug 2017 22:49:06 +0530 [thread overview]
Message-ID: <CAD6zSYPMyWw_LPSKVU8TBSfDE3KLkOHDw=yqjAmNXAZFSboozA@mail.gmail.com> (raw)
In-Reply-To: <1501768282-30088-1-git-send-email-praveen.paneri@intel.com>
Just realized that I have sent out a wrong patch. Plz ignore this.
Gonna send the correct one in some time.
Thanks,
Praveen
Thanks,
Praveen
On Thu, Aug 3, 2017 at 7:21 PM, Praveen Paneri <praveen.paneri@intel.com> wrote:
> This WA is required when decoupled frequencies for slice and unslice
> are enabled. This disables DOP clock gating for skl.
>
> v2: enable the WA for all gen9 platforms (not just for SKL GT4 where
> the hang issue is originally reported) to avoid rare hangs (David)
> v3: as per WaDatabase, enable it only for SKL (Rodrigo)
>
> Cc: David Weinehall <david.weinehall@linux.intel.com>
> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
> Signed-off-by: Praveen Paneri <praveen.paneri@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 3fc42aa..1c6bc08 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -60,7 +60,7 @@ static void gen9_init_clock_gating(struct drm_i915_private *dev_priv)
> {
> u32 misccpctl;
>
> - if (IS_SKL_GT4(dev_priv))
> + if (IS_SKYLAKE(dev_priv))
> {
> /* WaTempDisableDOPClkGating: */
> misccpctl = I915_READ(GEN7_MISCCPCTL);
> @@ -88,6 +88,12 @@ static void gen9_init_clock_gating(struct drm_i915_private *dev_priv)
> /* WaFbcHighMemBwCorruptionAvoidance:skl,bxt,kbl,cfl */
> I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
> ILK_DPFC_DISABLE_DUMMY0);
> +
> + if (IS_GEN9(dev_priv)) {
> + /* WaDisableDopClockGating */
> + I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL)
> + & ~GEN7_DOP_CLOCK_GATE_ENABLE);
> + }
> }
>
> static void bxt_init_clock_gating(struct drm_i915_private *dev_priv)
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2017-08-03 17:19 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-29 4:59 [PATCH] drm/i915: enable WaDisableDopClkGating for SKL GT4 Praveen Paneri
2017-07-30 10:48 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-08-02 16:41 ` [PATCH] " David Weinehall
2017-08-02 17:34 ` [PATCH] drm/i915: enable WaDisableDopClkGating for gen9 Praveen Paneri
2017-08-02 19:24 ` Rodrigo Vivi
2017-08-03 11:13 ` David Weinehall
2017-08-03 17:31 ` Rodrigo Vivi
2017-08-15 12:35 ` Ville Syrjälä
2017-08-03 13:51 ` [PATCH v3] drm/i915: enable WaDisableDopClkGating for skl Praveen Paneri
2017-08-03 17:19 ` Praveen Paneri [this message]
2017-08-03 17:32 ` Praveen Paneri
2017-08-03 17:37 ` Rodrigo Vivi
2017-08-03 17:41 ` Praveen Paneri
2017-08-03 19:31 ` Rodrigo Vivi
2017-08-02 18:07 ` ✗ Fi.CI.BAT: warning for drm/i915: enable WaDisableDopClkGating for SKL GT4 (rev2) Patchwork
2017-08-03 17:44 ` ✓ Fi.CI.BAT: success for drm/i915: enable WaDisableDopClkGating for SKL GT4 (rev4) Patchwork
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