From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Drake Subject: Re: [PATCH] pinctrl: intel: save HOSTSW_OWN register over suspend/resume Date: Thu, 28 Mar 2019 17:38:01 +0800 Message-ID: References: <20171116124431.GS17200@lahna.fi.intel.com> <20171117064904.GZ17200@lahna.fi.intel.com> <20171121105205.GP22431@lahna.fi.intel.com> <20171121120422.GR22431@lahna.fi.intel.com> <20190327172940.GR3622@lahna.fi.intel.com> <20190328091729.GV9224@smile.fi.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: In-Reply-To: <20190328091729.GV9224@smile.fi.intel.com> Sender: linux-kernel-owner@vger.kernel.org To: Andy Shevchenko Cc: Mika Westerberg , Chris Chiu , Heikki Krogerus , Linus Walleij , "open list:PIN CONTROL SUBSYSTEM" , Linux Kernel , Linux Upstreaming Team List-Id: linux-gpio@vger.kernel.org On Thu, Mar 28, 2019 at 5:17 PM Andy Shevchenko wrote: > Hmm... Can you confirm that laptop you declared as a fixed case and the > mentioned here is the same one? They are definitely not the same exact unit - originally we had a pre-production sample, and now we briefly diagnosed a real production unit that was sold to a customer. There could be subtle motherboard variations as you mention. > If it's the case, I recommend to ping Asus again and make them check and fix. We'll keep an eye open for any opportunities to go deeper here. However further investigation on both our side and theirs is blocked by not having any of the affected hardware (since the models are now so old), so I'm not very optimistic that we'll be able to make progress there. > Meanwhile, Mika's proposal sounds feasible and not so intrusive. We may > implement this later on. Chris will work on implementing this for your consideration. Thanks for the quick feedback! Daniel