From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Drake Date: Tue, 22 Jul 2014 14:08:36 +0100 Subject: [U-Boot] ODROID dynamic memory initialization Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Przemyslaw, While looking at the old uboot from hardkernel, I'm curious about CONFIG_CLK_BUS_DMC_220_440, which is set by default. This appears to run the memory at a high speed, by writing certain registers in the Dynamic Memory Controller (e.g. TIMINGROW), and clocking MPLL to 880MHz. Your uboot patches don't seem to touch DMC regs like TIMINGROW, and also clock the MPLL at 800MHz. I'm wondering if there is any reason for this? Wouldn't it be better to run at the faster speed like the vendor code does? Thanks Daniel