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From: Doug Anderson <dianders@chromium.org>
To: Brian Norris <briannorris@chromium.org>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	Chen-Yu Tsai <wenst@chromium.org>,
	LKML <linux-kernel@vger.kernel.org>,
	"open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [RESEND PATCH 2/2] arm64: dts: rockchip: add Coresight debug range for RK3399
Date: Wed, 8 Sep 2021 08:09:44 -0700	[thread overview]
Message-ID: <CAD=FV=Uo7oK6a8X69KGneP8CvXE127ZxU7U59Rrz+_Dv6D5t3g@mail.gmail.com> (raw)
In-Reply-To: <20210907094628.RESEND.2.Ibc87b4785709543c998cc852c1edaeb7a08edf5c@changeid>

Hi,

On Tue, Sep 7, 2021 at 9:46 AM Brian Norris <briannorris@chromium.org> wrote:
>
> Per Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt.
>
> This IP block can be used for sampling the PC of any given CPU, which is
> useful in certain panic scenarios where you can't get the CPU to stop
> cleanly (e.g., hard lockup).
>
> Signed-off-by: Brian Norris <briannorris@chromium.org>
> ---
>
>  arch/arm64/boot/dts/rockchip/rk3399.dtsi | 48 ++++++++++++++++++++++++
>  1 file changed, 48 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 3871c7fd83b0..c8c62637b600 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -433,6 +433,54 @@ usbdrd_dwc3_1: usb@fe900000 {
>                 };
>         };
>
> +       debug@fe430000 {

I think your sort order is wrong? 0xfe430000 comes before 0xfe900000?

Other than that this looks good to me.

Reviewed-by: Douglas Anderson <dianders@chromium.org>

WARNING: multiple messages have this Message-ID (diff)
From: Doug Anderson <dianders@chromium.org>
To: Brian Norris <briannorris@chromium.org>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Michael Turquette <mturquette@baylibre.com>,
	 Stephen Boyd <sboyd@kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	 Chen-Yu Tsai <wenst@chromium.org>,
	LKML <linux-kernel@vger.kernel.org>,
	 "open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	 Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [RESEND PATCH 2/2] arm64: dts: rockchip: add Coresight debug range for RK3399
Date: Wed, 8 Sep 2021 08:09:44 -0700	[thread overview]
Message-ID: <CAD=FV=Uo7oK6a8X69KGneP8CvXE127ZxU7U59Rrz+_Dv6D5t3g@mail.gmail.com> (raw)
In-Reply-To: <20210907094628.RESEND.2.Ibc87b4785709543c998cc852c1edaeb7a08edf5c@changeid>

Hi,

On Tue, Sep 7, 2021 at 9:46 AM Brian Norris <briannorris@chromium.org> wrote:
>
> Per Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt.
>
> This IP block can be used for sampling the PC of any given CPU, which is
> useful in certain panic scenarios where you can't get the CPU to stop
> cleanly (e.g., hard lockup).
>
> Signed-off-by: Brian Norris <briannorris@chromium.org>
> ---
>
>  arch/arm64/boot/dts/rockchip/rk3399.dtsi | 48 ++++++++++++++++++++++++
>  1 file changed, 48 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 3871c7fd83b0..c8c62637b600 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -433,6 +433,54 @@ usbdrd_dwc3_1: usb@fe900000 {
>                 };
>         };
>
> +       debug@fe430000 {

I think your sort order is wrong? 0xfe430000 comes before 0xfe900000?

Other than that this looks good to me.

Reviewed-by: Douglas Anderson <dianders@chromium.org>

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Doug Anderson <dianders@chromium.org>
To: Brian Norris <briannorris@chromium.org>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Michael Turquette <mturquette@baylibre.com>,
	 Stephen Boyd <sboyd@kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	 Chen-Yu Tsai <wenst@chromium.org>,
	LKML <linux-kernel@vger.kernel.org>,
	 "open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	 Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [RESEND PATCH 2/2] arm64: dts: rockchip: add Coresight debug range for RK3399
Date: Wed, 8 Sep 2021 08:09:44 -0700	[thread overview]
Message-ID: <CAD=FV=Uo7oK6a8X69KGneP8CvXE127ZxU7U59Rrz+_Dv6D5t3g@mail.gmail.com> (raw)
In-Reply-To: <20210907094628.RESEND.2.Ibc87b4785709543c998cc852c1edaeb7a08edf5c@changeid>

Hi,

On Tue, Sep 7, 2021 at 9:46 AM Brian Norris <briannorris@chromium.org> wrote:
>
> Per Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt.
>
> This IP block can be used for sampling the PC of any given CPU, which is
> useful in certain panic scenarios where you can't get the CPU to stop
> cleanly (e.g., hard lockup).
>
> Signed-off-by: Brian Norris <briannorris@chromium.org>
> ---
>
>  arch/arm64/boot/dts/rockchip/rk3399.dtsi | 48 ++++++++++++++++++++++++
>  1 file changed, 48 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 3871c7fd83b0..c8c62637b600 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -433,6 +433,54 @@ usbdrd_dwc3_1: usb@fe900000 {
>                 };
>         };
>
> +       debug@fe430000 {

I think your sort order is wrong? 0xfe430000 comes before 0xfe900000?

Other than that this looks good to me.

Reviewed-by: Douglas Anderson <dianders@chromium.org>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-09-08 15:10 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-07 16:46 [RESEND PATCH 1/2] clk: rockchip: rk3399: expose PCLK_COREDBG_{B,L} Brian Norris
2021-09-07 16:46 ` Brian Norris
2021-09-07 16:46 ` Brian Norris
2021-09-07 16:46 ` [RESEND PATCH 2/2] arm64: dts: rockchip: add Coresight debug range for RK3399 Brian Norris
2021-09-07 16:46   ` Brian Norris
2021-09-07 16:46   ` Brian Norris
2021-09-08  2:09   ` Leo Yan
2021-09-08  2:09     ` Leo Yan
2021-09-08  2:09     ` Leo Yan
2021-09-08  5:12   ` Chen-Yu Tsai
2021-09-08  5:12     ` Chen-Yu Tsai
2021-09-08  5:12     ` Chen-Yu Tsai
2021-09-08 15:09   ` Doug Anderson [this message]
2021-09-08 15:09     ` Doug Anderson
2021-09-08 15:09     ` Doug Anderson
2021-09-08 18:09     ` Brian Norris
2021-09-08 18:09       ` Brian Norris
2021-09-08 18:09       ` Brian Norris
2021-09-08  5:00 ` [RESEND PATCH 1/2] clk: rockchip: rk3399: expose PCLK_COREDBG_{B,L} Chen-Yu Tsai
2021-09-08  5:00   ` [RESEND PATCH 1/2] clk: rockchip: rk3399: expose PCLK_COREDBG_{B, L} Chen-Yu Tsai
2021-09-08  5:00   ` Chen-Yu Tsai
2021-09-08  7:32   ` [RESEND PATCH 1/2] clk: rockchip: rk3399: expose PCLK_COREDBG_{B,L} Heiko Stübner
2021-09-08  7:32     ` [RESEND PATCH 1/2] clk: rockchip: rk3399: expose PCLK_COREDBG_{B, L} Heiko Stübner
2021-09-08  7:32     ` Heiko Stübner

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