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[209.85.208.54]) by smtp.gmail.com with ESMTPSA id g23-20020a17090670d700b006ccfd4163f7sm309028ejk.206.2022.03.31.16.31.23 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 31 Mar 2022 16:31:23 -0700 (PDT) Received: by mail-ed1-f54.google.com with SMTP id a17so1023624edm.9 for ; Thu, 31 Mar 2022 16:31:23 -0700 (PDT) X-Received: by 2002:a5d:5551:0:b0:203:f916:e319 with SMTP id g17-20020a5d5551000000b00203f916e319mr5707669wrw.422.1648769060253; Thu, 31 Mar 2022 16:24:20 -0700 (PDT) MIME-Version: 1.0 References: <1648656179-10347-1-git-send-email-quic_sbillaka@quicinc.com> <1648656179-10347-9-git-send-email-quic_sbillaka@quicinc.com> In-Reply-To: From: Doug Anderson Date: Thu, 31 Mar 2022 16:24:07 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v6 8/8] drm/msm/dp: Handle eDP mode_valid differently from dp To: "Sankeerth Billakanti (QUIC)" Cc: "dmitry.baryshkov@linaro.org" , "dri-devel@lists.freedesktop.org" , "linux-arm-msm@vger.kernel.org" , "freedreno@lists.freedesktop.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "robdclark@gmail.com" , "seanpaul@chromium.org" , "swboyd@chromium.org" , quic_kalyant , "Abhinav Kumar (QUIC)" , "Kuogee Hsieh (QUIC)" , "bjorn.andersson@linaro.org" , "sean@poorly.run" , "airlied@linux.ie" , "daniel@ffwll.ch" , quic_vproddut , "Aravind Venkateswaran (QUIC)" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi, On Wed, Mar 30, 2022 at 11:02 PM Sankeerth Billakanti (QUIC) wrote: > > Hi Dmitry, > > > On Wed, 30 Mar 2022 at 19:04, Sankeerth Billakanti > > wrote: > > > > > > The panel-edp driver modes needs to be validated differently from DP > > > because the link capabilities are not available for EDP by that time. > > > > > > Signed-off-by: Sankeerth Billakanti > > > > This should not be necessary after > > https://patchwork.freedesktop.org/patch/479261/?series=101682&rev=1. > > Could you please check? > > > > The check for DP_MAX_PIXEL_CLK_KHZ is not necessary anymore but we need > to return early for eDP because unlike DP, eDP context will not have the information > about the number of lanes and link clock. > > So, I will modify the patch to return after the DP_MAX_PIXEL_CLK_KHZ check if is_eDP is set. I haven't walked through all the relevant code but something you said above sounds strange. You say that for eDP we don't have info about the number of lanes? We _should_. It's certainly possible to have a panel that supports _either_ 1 or 2 lanes but then only physically connect 1 lane to it. ...or you could have a panel that supports 2 or 4 lanes and you only connect 1 lane. See, for instance, ti_sn_bridge_parse_lanes. There we assume 4 lanes but if a "data-lanes" property is present then we can use that to know that fewer lanes are physically connected. It's also possible to connect more lanes to a panel than it supports. You could connect 2 lanes to it but then it only supports 1. This case needs to be handled as well... -Doug From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B76ACC433F5 for ; Thu, 31 Mar 2022 23:32:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EFC4810E12B; Thu, 31 Mar 2022 23:32:11 +0000 (UTC) Received: from mail-ej1-x62a.google.com (mail-ej1-x62a.google.com [IPv6:2a00:1450:4864:20::62a]) by gabe.freedesktop.org (Postfix) with ESMTPS id D7F4910E12B for ; Thu, 31 Mar 2022 23:32:10 +0000 (UTC) Received: by mail-ej1-x62a.google.com with SMTP id bq8so2367000ejb.10 for ; Thu, 31 Mar 2022 16:32:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=UvSSaxHQfu4KzKOKApPWWxQRgS6ya5jprTe140uOq38=; b=kRhrubUDhwfjRpRcH2joioz8ltkxfJNbJymSnvaltF2wfQaBrE1Vt07IDBgRkdEHXE oyt/cLr6MOTdSRSYEb/qZXgAbgWmYV8v91sSnENZIrXOCOvtBY6eMgGQehbIw9f54vHH Liv7tiuP7y9hjW7LHsjGWLQo+Eqrwsqz2awtg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=UvSSaxHQfu4KzKOKApPWWxQRgS6ya5jprTe140uOq38=; b=OiTc+HWg+hBX3XPnnqDlSi8vnAfrorn2333enPqNRcY9HJVmdTVTRHuyWIitbjfZJb yhOU0LcxF95Nny+o9ZFvu8lNAtD3nZuRxqEZskrIhjr7ZPYbAxVLL0p62COB9IkbDoGa MX22ydO/tPrdmSfVFngfeOlsJwmuG5KXbV7JMm7DmsGkN4iP2sgXlmvDxTiunzCpfKT/ GegHKTAo9AW/sawHSt/W6J62YUImriL2IY+7jOIzep3EqlMsCA7yZYCgZibOotNPGyhK 5kqZmREAh0kqEGpiJiBfz6nquqX344QIERbyRQwC59FFFGXNExS7OSA5jxRe/Vz59kU7 EGdg== X-Gm-Message-State: AOAM531pJhZQxQKGdgkg7v79YeRaRmiNdVDCIqwA8XVXYtYp0aaqVLnA RseEcIUL2ebh8FKiYZ23tjJ8jfqagR8tSedlkD4= X-Google-Smtp-Source: ABdhPJzo+evps0ogjBdhFLQDKlWyrtbWrkRTdvOsSBtJwCK75pXoraG8qtIukSruHWsCZk8adfPHPA== X-Received: by 2002:a17:907:7f93:b0:6db:7634:f214 with SMTP id qk19-20020a1709077f9300b006db7634f214mr6889859ejc.3.1648769529044; Thu, 31 Mar 2022 16:32:09 -0700 (PDT) Received: from mail-ej1-f53.google.com (mail-ej1-f53.google.com. [209.85.218.53]) by smtp.gmail.com with ESMTPSA id z12-20020a17090674cc00b006df9afdda91sm317375ejl.185.2022.03.31.16.32.08 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 31 Mar 2022 16:32:08 -0700 (PDT) Received: by mail-ej1-f53.google.com with SMTP id j15so2376140eje.9 for ; Thu, 31 Mar 2022 16:32:08 -0700 (PDT) X-Received: by 2002:a5d:5551:0:b0:203:f916:e319 with SMTP id g17-20020a5d5551000000b00203f916e319mr5707669wrw.422.1648769060253; Thu, 31 Mar 2022 16:24:20 -0700 (PDT) MIME-Version: 1.0 References: <1648656179-10347-1-git-send-email-quic_sbillaka@quicinc.com> <1648656179-10347-9-git-send-email-quic_sbillaka@quicinc.com> In-Reply-To: From: Doug Anderson Date: Thu, 31 Mar 2022 16:24:07 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v6 8/8] drm/msm/dp: Handle eDP mode_valid differently from dp To: "Sankeerth Billakanti (QUIC)" Content-Type: text/plain; charset="UTF-8" X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: quic_kalyant , "devicetree@vger.kernel.org" , "bjorn.andersson@linaro.org" , "Abhinav Kumar \(QUIC\)" , quic_vproddut , "airlied@linux.ie" , "linux-arm-msm@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "swboyd@chromium.org" , "sean@poorly.run" , "seanpaul@chromium.org" , "dmitry.baryshkov@linaro.org" , "Aravind Venkateswaran \(QUIC\)" , "Kuogee Hsieh \(QUIC\)" , "freedreno@lists.freedesktop.org" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi, On Wed, Mar 30, 2022 at 11:02 PM Sankeerth Billakanti (QUIC) wrote: > > Hi Dmitry, > > > On Wed, 30 Mar 2022 at 19:04, Sankeerth Billakanti > > wrote: > > > > > > The panel-edp driver modes needs to be validated differently from DP > > > because the link capabilities are not available for EDP by that time. > > > > > > Signed-off-by: Sankeerth Billakanti > > > > This should not be necessary after > > https://patchwork.freedesktop.org/patch/479261/?series=101682&rev=1. > > Could you please check? > > > > The check for DP_MAX_PIXEL_CLK_KHZ is not necessary anymore but we need > to return early for eDP because unlike DP, eDP context will not have the information > about the number of lanes and link clock. > > So, I will modify the patch to return after the DP_MAX_PIXEL_CLK_KHZ check if is_eDP is set. I haven't walked through all the relevant code but something you said above sounds strange. You say that for eDP we don't have info about the number of lanes? We _should_. It's certainly possible to have a panel that supports _either_ 1 or 2 lanes but then only physically connect 1 lane to it. ...or you could have a panel that supports 2 or 4 lanes and you only connect 1 lane. See, for instance, ti_sn_bridge_parse_lanes. There we assume 4 lanes but if a "data-lanes" property is present then we can use that to know that fewer lanes are physically connected. It's also possible to connect more lanes to a panel than it supports. You could connect 2 lanes to it but then it only supports 1. This case needs to be handled as well... -Doug