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From: Doug Anderson <dianders@chromium.org>
To: Stephen Boyd <swboyd@chromium.org>
Cc: Andy Gross <agross@kernel.org>,
	Judy Hsiao <judyhsiao@chromium.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Srini Kandagatla <srinivas.kandagatla@linaro.org>,
	Matthias Kaehlcke <mka@chromium.org>,
	Jimmy Cheng-Yi Chiang <cychiang@google.com>,
	Judy Hsiao <judyhsiao@google.com>,
	Tzung-Bi Shih <tzungbi@chromium.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	linux-arm-msm <linux-arm-msm@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [v2 1/3] arm64: dts: qcom: sc7280: herobrine: Add pinconf settings for mi2s1
Date: Fri, 20 May 2022 13:39:21 -0700	[thread overview]
Message-ID: <CAD=FV=VX_dr+hrNEGyC7GxcYcbMeL-uMaVLEJ5EgKnb76HVoDA@mail.gmail.com> (raw)
In-Reply-To: <CAE-0n53e0bq_MbfgZYdxatP8CpGVMKkBKOnSDOV+MvbBFB6wOA@mail.gmail.com>

Hi,

On Fri, May 20, 2022 at 1:38 PM Stephen Boyd <swboyd@chromium.org> wrote:
>
> Quoting Judy Hsiao (2022-05-20 09:10:02)
> > 1. Add drive strength property for mi2s1 on sc7280 based platforms.
> > 2. Disbale the pull-up mi2s1_data0, mi2s1_sclk.
>
> s/Disbale/Disable/
>
> The commit text is a list of things done but no reason why they're done.
> I'd appreciate more freeform text with a blurb why a drive strength is
> chosen and why pulls are disabled.
>
> > Signed-off-by: Judy Hsiao <judyhsiao@chromium.org>
> > ---
> >  arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 14 ++++++++++++++
> >  1 file changed, 14 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
> > index 9cb1bc8ed6b5..6d8744e130b0 100644
> > --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
> > @@ -612,6 +612,20 @@ &dp_hot_plug_det {
> >         bias-disable;
> >  };
> >
> > +&mi2s1_data0 {
> > +       drive-strength = <6>;
> > +       bias-disable;
>
> Is there an external pull on this line?
>
> > +};
> > +
> > +&mi2s1_sclk {
> > +       drive-strength = <6>;
> > +       bias-disable;
>
> Is there an external pull on this line? If so please add that details as
> a comment like we do for other external pulls.

Actually, I think they are output lines, which is why they have a
drive-strength. I think for output lines we don't usually comment
about why we're disabling the pulls, only for input lines?

-Doug

WARNING: multiple messages have this Message-ID
From: Doug Anderson <dianders@chromium.org>
To: Stephen Boyd <swboyd@chromium.org>
Cc: Andy Gross <agross@kernel.org>,
	Judy Hsiao <judyhsiao@chromium.org>,
	 Bjorn Andersson <bjorn.andersson@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Srini Kandagatla <srinivas.kandagatla@linaro.org>,
	Matthias Kaehlcke <mka@chromium.org>,
	 Jimmy Cheng-Yi Chiang <cychiang@google.com>,
	Judy Hsiao <judyhsiao@google.com>,
	Tzung-Bi Shih <tzungbi@chromium.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	 linux-arm-msm <linux-arm-msm@vger.kernel.org>,
	 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [v2 1/3] arm64: dts: qcom: sc7280: herobrine: Add pinconf settings for mi2s1
Date: Fri, 20 May 2022 13:39:21 -0700	[thread overview]
Message-ID: <CAD=FV=VX_dr+hrNEGyC7GxcYcbMeL-uMaVLEJ5EgKnb76HVoDA@mail.gmail.com> (raw)
In-Reply-To: <CAE-0n53e0bq_MbfgZYdxatP8CpGVMKkBKOnSDOV+MvbBFB6wOA@mail.gmail.com>

Hi,

On Fri, May 20, 2022 at 1:38 PM Stephen Boyd <swboyd@chromium.org> wrote:
>
> Quoting Judy Hsiao (2022-05-20 09:10:02)
> > 1. Add drive strength property for mi2s1 on sc7280 based platforms.
> > 2. Disbale the pull-up mi2s1_data0, mi2s1_sclk.
>
> s/Disbale/Disable/
>
> The commit text is a list of things done but no reason why they're done.
> I'd appreciate more freeform text with a blurb why a drive strength is
> chosen and why pulls are disabled.
>
> > Signed-off-by: Judy Hsiao <judyhsiao@chromium.org>
> > ---
> >  arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 14 ++++++++++++++
> >  1 file changed, 14 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
> > index 9cb1bc8ed6b5..6d8744e130b0 100644
> > --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
> > @@ -612,6 +612,20 @@ &dp_hot_plug_det {
> >         bias-disable;
> >  };
> >
> > +&mi2s1_data0 {
> > +       drive-strength = <6>;
> > +       bias-disable;
>
> Is there an external pull on this line?
>
> > +};
> > +
> > +&mi2s1_sclk {
> > +       drive-strength = <6>;
> > +       bias-disable;
>
> Is there an external pull on this line? If so please add that details as
> a comment like we do for other external pulls.

Actually, I think they are output lines, which is why they have a
drive-strength. I think for output lines we don't usually comment
about why we're disabling the pulls, only for input lines?

-Doug

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-05-20 20:39 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-20 16:10 [v2 0/3] Add dtsi for sc7280 herobrine boards that using rt5682 codec Judy Hsiao
2022-05-20 16:10 ` Judy Hsiao
2022-05-20 16:10 ` [v2 1/3] arm64: dts: qcom: sc7280: herobrine: Add pinconf settings for mi2s1 Judy Hsiao
2022-05-20 16:10   ` Judy Hsiao
2022-05-20 17:27   ` Matthias Kaehlcke
2022-05-20 17:27     ` Matthias Kaehlcke
2022-05-20 20:38   ` Stephen Boyd
2022-05-20 20:38     ` Stephen Boyd
2022-05-20 20:39     ` Doug Anderson [this message]
2022-05-20 20:39       ` Doug Anderson
2022-05-20 21:01       ` Stephen Boyd
2022-05-20 21:01         ` Stephen Boyd
2022-05-20 21:05         ` Doug Anderson
2022-05-20 21:05           ` Doug Anderson
2022-05-20 20:43   ` Doug Anderson
2022-05-20 20:43     ` Doug Anderson
2022-05-20 16:10 ` [v2 2/3] arm64: dts: qcom: sc7280: Add sc7280-herobrine-audio-rt5682.dtsi Judy Hsiao
2022-05-20 16:10   ` Judy Hsiao
2022-05-20 17:36   ` Matthias Kaehlcke
2022-05-20 17:36     ` Matthias Kaehlcke
2022-05-20 20:49   ` Doug Anderson
2022-05-20 20:49     ` Doug Anderson
2022-05-20 16:10 ` [v2 3/3] arm64: dts: qcom: sc7280: include sc7280-herobrine-audio-rt5682.dtsi in villager and herobrine-r1 Judy Hsiao
2022-05-20 16:10   ` Judy Hsiao
2022-05-20 17:59   ` Matthias Kaehlcke
2022-05-20 17:59     ` Matthias Kaehlcke
2022-05-20 20:50   ` Doug Anderson
2022-05-20 20:50     ` Doug Anderson
  -- strict thread matches above, loose matches on Subject: below --
2022-05-20 16:07 [v2 0/3] Add dtsi for sc7280 herobrine boards that using rt5682 codec Judy Hsiao
2022-05-20 16:07 ` [v2 1/3] arm64: dts: qcom: sc7280: herobrine: Add pinconf settings for mi2s1 Judy Hsiao
2022-05-20 16:07   ` Judy Hsiao

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